{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T20:35:29Z","timestamp":1761597329946},"publisher-location":"Berlin, Heidelberg","reference-count":19,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540581796"},{"type":"electronic","value":"9783540484691"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1994]]},"DOI":"10.1007\/3-540-58179-0_76","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T15:25:50Z","timestamp":1330269950000},"page":"468-480","source":"Crossref","is-referenced-by-count":18,"title":["Automatic verification of timed circuits"],"prefix":"10.1007","author":[{"given":"Tomas G.","family":"Rokicki","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Chris J.","family":"Myers","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,6,7]]},"reference":[{"issue":"2","key":"38_CR1","doi-asserted-by":"crossref","first-page":"106","DOI":"10.1109\/92.238425","volume":"1","author":"C. J. Myers","year":"1993","unstructured":"Chris J. Myers and Teresa H.-Y. Meng. Synthesis of timed asynchronous circuits. IEEE Transactions on VLSI Systems, 1(2):106\u2013119, June 1993.","journal-title":"IEEE Transactions on VLSI Systems"},{"key":"38_CR2","unstructured":"Alain J. Martin. Programming in VLSI: From communicating processes to delay-insensitive VLSI circuits. In C.A.R. Hoare, editor, UT Year of Programming Institute on Concurrent Programming. Addison-Wesley, 1990."},{"key":"38_CR3","doi-asserted-by":"crossref","unstructured":"Martin Rem, Jan L. A. van de Snepscheut, and Jan Tijmen Udding. Trace theory and the definition of hierarchical components. In R. Bryant, editor, Third Caltech Conference on VLSI, pages 225\u2013239. Computer Science Press, Inc., 1983.","DOI":"10.1007\/978-3-642-95432-0_13"},{"key":"38_CR4","doi-asserted-by":"crossref","unstructured":"David L. Dill. Trace theory for automatic hierarchial verification of speed-independent circuits. ACM Distinguished Dissertations, 1989.","DOI":"10.7551\/mitpress\/6874.001.0001"},{"key":"38_CR5","doi-asserted-by":"crossref","unstructured":"Jerry R. Burch. Trace Algebra for Automatic Verification of Real-Time Concurrent Systems. PhD thesis, Carnegie Mellon University, 1992.","DOI":"10.21236\/ADA256199"},{"key":"38_CR6","doi-asserted-by":"crossref","unstructured":"David L. Dill. Timing assumptions and verification of finite-state concurrent systems. In Proceedings of the Workshop on Automatic Verification Methods for Finite-State Systems, June 1989.","DOI":"10.1007\/3-540-52148-8_17"},{"key":"38_CR7","unstructured":"Harry R. Lewis. Finite-state analysis of asynchronous circuits with bounded temporal uncertainty. Technical report, Harvard University, July 1989."},{"key":"38_CR8","doi-asserted-by":"crossref","unstructured":"Bernard Berthomieu and Michel Diaz. Modeling and verification of time dependent systems using time petri nets. IEEE Transactions on Software Engineering, 17(3), March 1991.","DOI":"10.1109\/32.75415"},{"key":"38_CR9","doi-asserted-by":"crossref","unstructured":"R. Alur, C. Courcoubetis, D. Dill, N. Halbwachs, and H. Wong-Toi. An implementation of three algorithms for timing verification based on automata emptiness. In Proceedings of the Real-rime Systems Symposium, pages 157\u2013166. IEEE Computer Society Press, 1992.","DOI":"10.1109\/REAL.1992.242667"},{"key":"38_CR10","doi-asserted-by":"crossref","unstructured":"Thomas Henzinger, Xavier Nicollin, Joseph Sifakis, and Sergio Yovine. Symbolic model-checking for real-time systems. In Proceedings of the 7th Symposium Logics in Computers Science. IEEE Computer Society Press, 1992.","DOI":"10.1109\/LICS.1992.185551"},{"key":"38_CR11","doi-asserted-by":"crossref","unstructured":"Nicolas Halbwachs. Delay analysis in synchronous programs. In Costas Courcoubetis, editor, Computer Aided Verification, pages 333\u2013346. Springer-Verlag, 1993.","DOI":"10.1007\/3-540-56922-7_28"},{"key":"38_CR12","doi-asserted-by":"crossref","unstructured":"Tomohiro Yoneda, Atsufumi Shibayama, Bernd-Hologer Schlingloff, and Edmund M. Clarke. Efficient verification of parallel real-time systems. In Costas Courcoubetis, editor, Computer Aided Verification, pages 321\u2013332. Springer-Verlag, 1993.","DOI":"10.1007\/3-540-56922-7_27"},{"key":"38_CR13","unstructured":"James L. Peterson. Petri Net Theory and the Modeling of Systems. Prentice Hall, 1981."},{"issue":"3","key":"38_CR14","doi-asserted-by":"crossref","first-page":"301","DOI":"10.1016\/0167-9260(92)90033-U","volume":"13","author":"P. A. Beerel","year":"1992","unstructured":"Peter A. Beerel and Teresa H.-Y. Meng. Semi-modularity and testability of speed-independent circuits. INTEGRATION, the VLSI journal, 13(3):301\u2013322, September 1992.","journal-title":"INTEGRATION, the VLSI journal"},{"key":"38_CR15","unstructured":"Tomas G. Rokicki. Representing and Modeling Circuits. PhD thesis, Stanford University, 1993."},{"key":"38_CR16","doi-asserted-by":"crossref","unstructured":"Thomas A. Henzinger, Zohar Manna, and Amir Pnueli. What good are digital clocks? In ICALP 92: Automata, Languages, and Programming, pages 545\u2013547. Springer-Verlag, 1992.","DOI":"10.1007\/3-540-55719-9_103"},{"key":"38_CR17","unstructured":"Rajeev Alur. Techniques for Automatic Verification of Real-Time Systems. PhD thesis, Stanford University, August 1991."},{"key":"38_CR18","unstructured":"Chris J. Myers and Teresa H.-Y. Meng. Automatic hazard-free decomposition of high-fanin gates in asynchronous circuit synthesis. To be published."},{"key":"38_CR19","unstructured":"Ken Yun. Private communication, 1993."}],"container-title":["Lecture Notes in Computer Science","Computer Aided Verification"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-58179-0_76.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,17]],"date-time":"2020-11-17T21:18:01Z","timestamp":1605647881000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-58179-0_76"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994]]},"ISBN":["9783540581796","9783540484691"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/3-540-58179-0_76","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1994]]}}}