{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:12:46Z","timestamp":1725664366160},"publisher-location":"Berlin, Heidelberg","reference-count":3,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540584193"},{"type":"electronic","value":"9783540487838"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1994]]},"DOI":"10.1007\/3-540-58419-6_113","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T15:58:03Z","timestamp":1330271883000},"page":"321-325","source":"Crossref","is-referenced-by-count":1,"title":["The architecture of a general-purpose processor cell"],"prefix":"10.1007","author":[{"given":"Ji\u0159\u00ed","family":"Dan\u011b\u010dek","sequence":"first","affiliation":[]},{"given":"Alois","family":"Pluh\u00e1\u010dek","sequence":"additional","affiliation":[]},{"given":"Michal Z.","family":"Serv\u00edt","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,17]]},"reference":[{"key":"50_CR1","unstructured":"Dan\u011b\u010dek, J., Dr\u00e1pal, F., Pluh\u00e1\u010dek, A., Sal\u010di\u010d, Z., Serv\u00edt, M.: DOP \u2014 A Simple Processor for Custom Computing Machines. Journal of Microcomputer Applications (to appear)"},{"key":"50_CR2","unstructured":"Dan\u011b\u010dek, J., Dr\u00e1pal, F., Pluh\u00e1\u010dek, A., Sal\u010di\u010d, Z., Serv\u00edt, M.: Methodologies for Computer Aided Hardware\/Software Co-Design Using Field Programmable Gate Arrays. Research Report. Dept. of Computers, CTU Prague (in print)"},{"key":"50_CR3","first-page":"55","volume-title":"CTU SEMINAR 94","author":"A. Pluh\u00e1\u010dek","year":"1994","unstructured":"Pluh\u00e1\u010dek, A., Dan\u011b\u010dek, J.: The Manipulation with Flags on the DOP Processor. CTU SEMINAR 94, CTU Prague 1994, 55\u201356"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic Architectures, Synthesis and Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-58419-6_113.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,28]],"date-time":"2021-04-28T01:15:03Z","timestamp":1619572503000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-58419-6_113"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994]]},"ISBN":["9783540584193","9783540487838"],"references-count":3,"URL":"https:\/\/doi.org\/10.1007\/3-540-58419-6_113","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1994]]}}}