{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:12:36Z","timestamp":1725664356050},"publisher-location":"Berlin, Heidelberg","reference-count":7,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540584193"},{"type":"electronic","value":"9783540487838"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1994]]},"DOI":"10.1007\/3-540-58419-6_95","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T15:56:54Z","timestamp":1330271814000},"page":"251-258","source":"Crossref","is-referenced-by-count":4,"title":["FPGA based prototyping for verification and evaluation in hardware-software cosynthesis"],"prefix":"10.1007","author":[{"given":"Th.","family":"Benner","sequence":"first","affiliation":[]},{"given":"R.","family":"Ernst","sequence":"additional","affiliation":[]},{"given":"I.","family":"K\u00f6nenkamp","sequence":"additional","affiliation":[]},{"given":"U.","family":"Holtmann","sequence":"additional","affiliation":[]},{"given":"P.","family":"Sch\u00fcler","sequence":"additional","affiliation":[]},{"given":"H. -C.","family":"Schaub","sequence":"additional","affiliation":[]},{"given":"N.","family":"Serafimov","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,17]]},"reference":[{"key":"32_CR1","doi-asserted-by":"crossref","unstructured":"R. Ernst, J. Henkel and Th. Benner, Hardware\/Software Co-Synthesis for Microcontrollers, IEEE Design & Test of Computers, pp. 64\u201375, Dec. 1993.","DOI":"10.1109\/54.245964"},{"key":"32_CR2","doi-asserted-by":"crossref","unstructured":"G. De Micheli et al., The Olympus Synthesis System, IEEE Design & Test of Computers, pp. 37\u201353, Oct. 1990.","DOI":"10.1109\/54.60605"},{"key":"32_CR3","unstructured":"U. Holtmann, Hierarchical Behavioural Representation in the Braunschweig Synthesis System BSS, IFIP Workshop on Application of Synthesis and Simulation, Lenggries, 25\u201328.8.1993."},{"key":"32_CR4","doi-asserted-by":"crossref","unstructured":"W. Ye, R. Ernst, Th. Benner, J. Henkel, Fast Timing Analysis for Hardware-Software Co-Synthesis, Proc. of ICCD 1993, Cambridge, pp. 452\u2013457, 1993.","DOI":"10.1109\/ICCD.1993.393335"},{"key":"32_CR5","unstructured":"LSI Logic Corporation, L64831 \u2014 SPARC Integrated IU\/FPU Technical Manual, Milpitas, Calif. 1992."},{"key":"32_CR6","unstructured":"Xilinx, Inc., The Programmable Logic Data Book, San Jose, Calif., 1993."},{"key":"32_CR7","unstructured":"Motorola Inc., MC68332 User's Manual, Phoenix, Arizona, 1990."}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic Architectures, Synthesis and Applications"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-58419-6_95.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,28]],"date-time":"2021-04-28T01:15:20Z","timestamp":1619572520000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-58419-6_95"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994]]},"ISBN":["9783540584193","9783540487838"],"references-count":7,"URL":"https:\/\/doi.org\/10.1007\/3-540-58419-6_95","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1994]]}}}