{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T16:30:05Z","timestamp":1725467405817},"publisher-location":"Berlin, Heidelberg","reference-count":9,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540612285"},{"type":"electronic","value":"9783540683889"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1996]]},"DOI":"10.1007\/3-540-61228-9_87","type":"book-chapter","created":{"date-parts":[[2006,7,17]],"date-time":"2006-07-17T14:17:05Z","timestamp":1153145825000},"page":"185-195","source":"Crossref","is-referenced-by-count":2,"title":["Reconfiguration Graph Grammar for massively parallel, fault tolerant computers"],"prefix":"10.1007","author":[{"given":"M. D.","family":"Derk","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"L. S.","family":"DeBrunner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2005,9,7]]},"reference":[{"key":"13_CR1","volume-title":"Fault Tolerance Through Reconfiguration in VLSI and WSI Arrays","author":"R. Negrini","year":"1989","unstructured":"R. Negrini, M.G. Sami, R. Stefanelli: Fault Tolerance Through Reconfiguration in VLSI and WSI Arrays. MIT Press, Cambridge, Mass., 1989."},{"key":"13_CR2","first-page":"452","volume-title":"Reconfiguration algorithm for fault tolerant arrays with minimum number of dangerous processors","author":"C. Chen","year":"1991","unstructured":"C. Chen, A. Feng, T. Kikuno, K. Torrii: Reconfiguration algorithm for fault tolerant arrays with minimum number of dangerous processors. 21st International Symposium on Fault-Tolerant Computing. Montreal, Quebec, Canada, 25\u201327 June, 1991. IEEE Computer Society Press, Los Alamitos, CA. pp. 452\u2013459."},{"issue":"no.1","key":"13_CR3","doi-asserted-by":"crossref","first-page":"55","DOI":"10.1109\/2.48799","volume":"23","author":"M. Chean","year":"1990","unstructured":"M. Chean, J. A. B. Fortes: A taxonomy of reconfiguration techniques for fault-tolerant processor arrays. Computer, vol. 23, no. 1, January, 1990, pp. 55\u201369.","journal-title":"Computer"},{"key":"13_CR4","series-title":"Proceedings. Lecture Notes in Computer Science #291","first-page":"73","volume-title":"Graph grammars and their application to computer science. 3rd international workshop","author":"D. A. Bailey","year":"1987","unstructured":"D. A. Bailey, J. E. Cuny: Graph grammar based specification of interconnection structures for massively parallel computation. Graph grammars and their application to computer science. 3rd international workshop. Warrenton. VA, USA. Dec. 1986 Proceedings. Lecture Notes in Computer Science #291. Springer-Verlag, Berlin, Heidelberg, 1987. pp. 73\u201385."},{"key":"13_CR5","doi-asserted-by":"crossref","first-page":"112","DOI":"10.1007\/3-540-17945-3_6","volume-title":"PARLE Parallel Architectures and Languages Europe, Vol. II: Parallel Languages","author":"D. A. Bailey","year":"1987","unstructured":"D. A. Bailey, J. E. Cuny: An approach to programming process interconnection structures: aggregate rewriting graph grammars. PARLE Parallel Architectures and Languages Europe, Vol. II: Parallel Languages. Eindhoven, The Netherlands. June 15\u201319. 1987 Proceedings. LNCS #259 Springer-Verlag, Berlin, Heidelberg, 1987. pp. 112\u2013123."},{"key":"13_CR6","first-page":"17","volume-title":"Languages and Compilers for Parallel Computing","author":"D. A. Bailey","year":"1990","unstructured":"D. A. Bailey, J. E. Cuny: Visual extensions to parallel programming languages. Languages and Compilers for Parallel Computing. ed. by Gelernter, David, et al. MIT Press, Cambridge, MA, 1990. p. 17\u201336."},{"key":"13_CR7","series-title":"LNCS #532","doi-asserted-by":"crossref","first-page":"84","DOI":"10.1007\/BFb0017383","volume-title":"Graph Grammars and their Application to Computer Science","author":"D. A. Bailey","year":"1991","unstructured":"D. A. Bailey, J. E. Cuny, C. D. Fisher: Programming with very large graphs. Graph Grammars and their Application to Computer Science. 4th International Workshop, Bremen, Germany. March 1990 Proceedings. LNCS #532. Springer-Verlag, Berlin, Heidelberg, 1991. pp. 84\u201397."},{"key":"13_CR8","unstructured":"M Derk, L. DeBrunner: Dynamic reconfiguration for fault tolerance with complete use of spares. Parallel and Distributed Computing and Systems. Proceedings of the Sixth IASTED\/ISMM International Conference. Washington. D.C., Oct 3\u20135.1994 IASTED, 1994, pp. 331\u2013334."},{"key":"13_CR9","first-page":"1058","volume-title":"Dynamic reconfiguration for fault tolerance for critical, real-time processor arrays","author":"M. Derk","year":"1994","unstructured":"M. Derk, L. DeBrunner: Dynamic reconfiguration for fault tolerance for critical, real-time processor arrays. Conference Record: Twenty-eighth Asilomar Conference on Signals, Systems and Computers. 1994. Vol. 2. Pacific Grove, CA, Maple Press, 1994, pp. 1058\u20131062."}],"container-title":["Lecture Notes in Computer Science","Graph Grammars and Their Application to Computer Science"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-61228-9_87","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,2,6]],"date-time":"2019-02-06T12:11:09Z","timestamp":1549455069000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-61228-9_87"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1996]]},"ISBN":["9783540612285","9783540683889"],"references-count":9,"URL":"https:\/\/doi.org\/10.1007\/3-540-61228-9_87","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1996]]}}}