{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T23:22:23Z","timestamp":1725664943750},"publisher-location":"Berlin, Heidelberg","reference-count":8,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540617303"},{"type":"electronic","value":"9783540706700"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1996]]},"DOI":"10.1007\/3-540-61730-2_21","type":"book-chapter","created":{"date-parts":[[2012,2,26]],"date-time":"2012-02-26T17:15:34Z","timestamp":1330276534000},"page":"200-209","source":"Crossref","is-referenced-by-count":2,"title":["Attempt-1: A reconfigurable multiprocessor testbed"],"prefix":"10.1007","author":[{"given":"Keisuke","family":"Inoue","sequence":"first","affiliation":[]},{"given":"Tohru","family":"Kisuki","sequence":"additional","affiliation":[]},{"given":"Michitaka","family":"Okuno","sequence":"additional","affiliation":[]},{"given":"Etsuko","family":"Shimizu","sequence":"additional","affiliation":[]},{"given":"Takuya","family":"Terasawa","sequence":"additional","affiliation":[]},{"given":"Hideharu","family":"Amano","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2005,6,6]]},"reference":[{"doi-asserted-by":"crossref","unstructured":"J. R. Goodman. Using Cache Memory to Reduce Processor-Memory Traffic. In Proc. of 10th Int'l Symp. on Computer Architecture, pages 124\u2013131, Jun 1983.","key":"21_CR1","DOI":"10.1145\/800046.801647"},{"doi-asserted-by":"crossref","unstructured":"T. Terasawa, S. Ogura, K. Inoue, and H. Amano. A Cache Coherence Protocol for Multiprocessor Chip. In Proc. of IEEE International Conference on Wafer Scale Integration, pages 238\u2013247, Jan 1995.","key":"21_CR2","DOI":"10.1109\/ICWSI.1995.515458"},{"unstructured":"T. Terasawa and H. Amano. Performance Evaluation of the Mixed-protocol Caches with Instruction Level Multiprocessor Simulator. In Proc. of IASTED International Conference on Modeling and Simulation, May 1994.","key":"21_CR3"},{"key":"21_CR4","doi-asserted-by":"crossref","first-page":"701","DOI":"10.1016\/0167-8191(94)00111-M","volume":"21","author":"T. Terasawa","year":"1995","unstructured":"T. Terasawa, O. Yamamoto, T. Kudoh, and H. Amano. A performance evaluation of the multiprocessor testbed ATTEMPT-0. Parallel Computing, 21:701\u2013730, 1995.","journal-title":"Parallel Computing"},{"issue":"4","key":"21_CR5","doi-asserted-by":"crossref","first-page":"273","DOI":"10.1145\/6513.6514","volume":"4","author":"J. Archibald","year":"1986","unstructured":"J. Archibald and J. L. Baer. Cache-Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model. ACM Trans. on Computer Systems, 4(4):273\u2013298, Nov 1986.","journal-title":"ACM Trans. on Computer Systems"},{"unstructured":"T. Matsumoto and K. Hiraki. Cache injection and high-performance memory-based synchronization mechanisms (in japanese). IPS Japan SIG Reports ARC-101-15, 93(71), August 1993.","key":"21_CR6"},{"doi-asserted-by":"crossref","unstructured":"A. R. Karlin, M. S. Manasse, L. Rudolph, and D. D. Sleator. Competitive Snoopy Caching. In Proc. of 27th Ann. Symp. on Foundations of Computer Science, pages 244\u2013254, Oct 1986.","key":"21_CR7","DOI":"10.1109\/SFCS.1986.14"},{"unstructured":"Draft 8.2 IEEE. Draft Standard: Futurebus+, February 1990.","key":"21_CR8"}],"container-title":["Lecture Notes in Computer Science","Field-Programmable Logic Smart Applications, New Paradigms and Compilers"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/3-540-61730-2_21.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,27]],"date-time":"2021-04-27T21:35:51Z","timestamp":1619559351000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/3-540-61730-2_21"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1996]]},"ISBN":["9783540617303","9783540706700"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/3-540-61730-2_21","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[1996]]}}}