{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T22:59:58Z","timestamp":1725490798513},"publisher-location":"Boston, MA","reference-count":11,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9780387736600"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-0-387-73661-7_4","type":"book-chapter","created":{"date-parts":[[2007,9,11]],"date-time":"2007-09-11T00:22:03Z","timestamp":1189470123000},"page":"41-53","source":"Crossref","is-referenced-by-count":4,"title":["Defragmentation Algorithms for Partially Reconfigurable Hardware"],"prefix":"10.1007","author":[{"given":"Markus","family":"Koester","sequence":"first","affiliation":[]},{"given":"Heiko","family":"Kalte","sequence":"additional","affiliation":[]},{"given":"Mario","family":"Porrmann","sequence":"additional","affiliation":[]},{"given":"Ulrich","family":"R\u00fcckert","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"issue":"1","key":"4_CR1_4","doi-asserted-by":"publisher","first-page":"68","DOI":"10.1109\/54.825678","volume":"17","author":"K. Bazargan","year":"2000","unstructured":"K. Bazargan, R. Kastner, and M. Sarrafzadeh. Fast template placement for reconfigurable computing systems. IEEE Design and Test of Computers, Vol. 17, No. 1:68-83, 2000.","journal-title":"IEEE Design and Test of Computers"},{"key":"4_CR2_4","unstructured":"E. G. Coffman, M. R. Garey, and D. S. Johnson. Approximation algorithms for bin packing: A survey. In D. Hochbaum, editor, Approximation algorithms. PWS Publishing Company, 1997."},{"key":"4_CR3_4","volume-title":"In Field-Programmable Logic and Applications. 7th Int. Workshop","author":"O Diessel","year":"1997","unstructured":"O. Diessel and H. ElGindy. Run-time compaction of FPGA designs. In Field-Programmable Logic and Applications. 7th Int. Workshop, volume 1304, London, U.K., 1997. Springer."},{"key":"4_CR4_4","unstructured":"H. Kalte, M. Koester, B. Kettelhoit, M. Porrmann, and U. R\u00fcckert. A comparative study on system approaches for partially reconfigurable architectures. In Proc. of the Int. Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA \u201904). CSREA Press, 2004."},{"key":"4_CR5_4","unstructured":"H. Kalte, G. Lee, M. Porrmann, and U. R\u00fcckert. Replica: A bitstream manipulation filter for module relocation in partial reconfigurable systems. In Proc. of the 19th International Parallel and Distributed Processing Symposium, 2005."},{"key":"4_CR6_4","unstructured":"H. Kalte, M. Porrmann, and U. R\u00fcckert. Study on column wise design compaction for reconfigurable systems. In Proceedings of the IEEE International Conference on Field Programmable Technology (FPT\u201904), 2004."},{"key":"4_CR7_4","unstructured":"H. Kalte, M. Porrmann, and U. R\u00fcckert. System-on-programmable-chip approach enabling online fine-grained 1D-placement. In 11th Reconfigurable Architectures Workshop (RAW 2004), Santa F, New Mexico, 2004."},{"key":"4_CR8_4","first-page":"121","volume-title":"Proceedings of the 10th International Workshop on Field-Programmable Logic and Applications","author":"H Simmler","year":"2000","unstructured":"H. Simmler, L. Levinson, and R. Manner. Multitasking on FPGA coprocessors. In Proceedings of the 10th International Workshop on Field-Programmable Logic and Applications, pages 121-130, London, UK, 2000. Springer."},{"key":"4_CR9_4","unstructured":"M. Ullmann, M. H\u00fcbner, B. Grimm, and J. Becker. An FPGA run-time system for dynamical on-demand reconfiguration. In Proc. of the 18th International Parallel and Distributed Processing Symposium. IEEE Computer Society, 2004."},{"key":"4_CR10_4","unstructured":"H. Walder and M. Platzner. Non-preemptive multitasking on FPGAs: Task placement and footprint transform. In Proc. of the Int. Conference on Engineering of Reconfigurable Systems and Architectures, pages 24-30. CSREA Press, 2002."},{"key":"4_CR11_4","unstructured":"Xilinx Inc. Application notes 151. Virtex series configuration architecture user guide, 2000."}],"container-title":["IFIP International Federation for Information Proc","Vlsi-Soc: From Systems To Silicon"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-0-387-73661-7_4.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,29]],"date-time":"2021-04-29T04:15:16Z","timestamp":1619669716000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-0-387-73661-7_4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9780387736600"],"references-count":11,"URL":"https:\/\/doi.org\/10.1007\/978-0-387-73661-7_4","relation":{},"subject":[]}}