{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,1,21]],"date-time":"2025-01-21T05:27:12Z","timestamp":1737437232888,"version":"3.33.0"},"publisher-location":"Boston, MA","reference-count":19,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9780387736600"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-0-387-73661-7_6","type":"book-chapter","created":{"date-parts":[[2007,9,11]],"date-time":"2007-09-11T00:22:03Z","timestamp":1189470123000},"page":"71-86","source":"Crossref","is-referenced-by-count":0,"title":["3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System"],"prefix":"10.1007","author":[{"given":"Chul","family":"Kim","sequence":"first","affiliation":[]},{"given":"Alex","family":"Rassau","sequence":"additional","affiliation":[]},{"given":"Stefan","family":"Lachowicz","sequence":"additional","affiliation":[]},{"given":"Saeid","family":"Nooshabadi","sequence":"additional","affiliation":[]},{"given":"Kamran","family":"Eshraghian","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"6_CR1_6","first-page":"1","volume":"2006","author":"K. Chul","year":"2006","unstructured":"Chul Kim et al, 3D-SoftChip: A Novel Architecture for Next Generation Adaptive Computing systems, EURASIP Journal on Applied Signal Processing, Volume 2006, Article ID 75032, (Feb. 2006), pp.1-13","journal-title":"EURASIP Journal on Applied Signal Processing"},{"key":"6_CR2_6","unstructured":"S. Eshraghian, S. Lachowicx, K. Eshraghian, 3D-Vertically Integrated Configurable Soft-Chip with Terabit Computational Bandwidth for Image and Data Processing, Proc. MIXDES\u20192003, (June 2003), pp.26-28"},{"key":"6_CR3_6","doi-asserted-by":"publisher","first-page":"922","DOI":"10.1109\/92.974905","volume":"9","author":"J.W. Joyner","year":"2001","unstructured":"J.W. Joyner, et al, Impact of three-dimensional architectures on interconnects in gigascale integration, IEEE Trans. VLSI Syst. Vol9, (Dec. 2001), pp.922-928","journal-title":"VLSI Syst"},{"issue":"4","key":"6_CR4_6","doi-asserted-by":"publisher","first-page":"367","DOI":"10.1109\/TVLSI.2004.825835","volume":"12","author":"J.W Joyner","year":"2004","unstructured":"Joyner J.W, Zarkesh-Ha P.J, Meindl J.D, Global Interconnect Design in a ThreeDimensional System-on-a-Chip, IEEE Trans. on VLSI Systems, Vol. 12, Issue 4, (April 2004), pp.367-372","journal-title":"on VLSI Systems"},{"key":"6_CR5_6","unstructured":"IZM, 3D System Integration; http:\/\/www.pb.izm.fhg.de\/izm\/015_Programms\/010_R\/"},{"issue":"No 5","key":"6_CR6_6","first-page":"602","volume":"89","author":"B. Kaustv","year":"2001","unstructured":"Kaustv Banerjee, et al, 3-D ICs: A Novel Chip Design for Improving DeepSubmicrometer Interconnection, Proceedings IEEE Special Issues on Interconnections, Vol. 89, No 5, (May 2001), pp.602-633","journal-title":"Proceedings IEEE Special Issues on Interconnections"},{"key":"6_CR7_6","doi-asserted-by":"crossref","unstructured":"C. Ebeling et al, Architecture design of reconfigurable pipelined datapaths, Advanced Research I VLSI, Proceeding 20th Anniversary Conference on (March 1999), pp.23-40, 21-40","DOI":"10.1109\/ARVLSI.1999.756035"},{"issue":"9","key":"6_CR8_6","first-page":"86","volume":"30","author":"E. Waingold","year":"1997","unstructured":"E. Waingold et al, Bring it all to software: RAW Machines, Computer, Vol.30, Issue9 (Sept. 1997) pp.86-93","journal-title":"RAW Machines, Computer"},{"key":"6_CR9_6","unstructured":"S. Hartej, L. Ming-hua, L. Guangming, J.K. Fadi, B. Nadar, M.C.F Eliseu, MorphoSys: An Integrated reconfigurable system for data-parallel and computation-intensive applications, IEEE Trans. on Computers, (May 2000), pp.456-481"},{"key":"6_CR10_6","unstructured":"QuickSilver Technology Inc., Adapt2400 ACM Architecture Overview; http:\/\/www.quicksilvertech.com\/pdfs\/Adapt2400_Whitepaper_0404.pdf"},{"key":"6_CR11_6","unstructured":"Elixent Ltd, The Reconfigurable Algorithm Processor; http:\/\/www.elixent.com\/products\/white_papers.htm"},{"key":"6_CR12_6","unstructured":"picoChip Design Limited, PC102 Product Brief; http:\/\/www.picochip.com"},{"key":"6_CR13_6","unstructured":"S. Eshraghian, Implementation of Arithmetic Primitives using Truly Deep Submicro Technology (TDST), Ms. Thesis, Edith Cowan University, (2004)"},{"key":"6_CR14_6","unstructured":"L. Guangming, Modeling, Implementation and Scalability of the MorphoSys Dynamically Reconfigurable Computing Architecture, PhD Thesis, University of California, Irvine, (2000)"},{"key":"6_CR15_6","unstructured":"Open SystemC Initiative, SystemC 2.0.1 Language Reference Manual Rev. 1.0; http:\/\/www.systemc.org"},{"key":"6_CR16_6","unstructured":"Hartej Singh, Reconfigurable Architectures for Multimedia and Data-Parallel Application Domains, PhD Thesis, University of California, Irvine, (2000)"},{"key":"6_CR17_6","unstructured":"Texas Instruments, TMS320C6000 Assembly Benchmarks; http:\/\/www.ti.com\/sc\/docs\/products\/dsp\/c6000\/benchmarks\/67x.htm"},{"issue":"No.10","key":"6_CR18_6","first-page":"1371","volume":"36","author":"K.M. Yang","year":"1999","unstructured":"K.M. Yang, M-T. Sun and L.Wu, A Family of VLSI Design of Motion Compensation Block Matching Algorithm, IEEE Trans. on Circuits and Systems, Vol 36, No.10, (October 1999), pp.1317-25","journal-title":"on Circuits and Systems"},{"key":"6_CR19_6","doi-asserted-by":"crossref","first-page":"167","DOI":"10.1109\/76.143416","volume":"2","author":"C. Hsieh","year":"1992","unstructured":"C. Hsieh and T. Lin, VLSI Architecture for Block Matching Motion Estimation Algorithm, IEEE Trans. on Circuits and Systems for Video Technology, Vol2, (June 1992), pp.167-175","journal-title":"on Circuits and Systems for Video Technology"}],"container-title":["IFIP International Federation for Information Proc","Vlsi-Soc: From Systems To Silicon"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-0-387-73661-7_6.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,20]],"date-time":"2025-01-20T23:05:51Z","timestamp":1737414351000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-0-387-73661-7_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9780387736600"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/978-0-387-73661-7_6","relation":{},"subject":[]}}