{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,12]],"date-time":"2025-02-12T05:29:15Z","timestamp":1739338155013,"version":"3.37.0"},"publisher-location":"Boston, MA","reference-count":20,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9780387895574"},{"type":"electronic","value":"9780387895581"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009]]},"DOI":"10.1007\/978-0-387-89558-1_3","type":"book-chapter","created":{"date-parts":[[2009,8,5]],"date-time":"2009-08-05T20:04:21Z","timestamp":1249502661000},"page":"1-20","source":"Crossref","is-referenced-by-count":2,"title":["A Programmable Multi-Dimensional Analog Radial-Basis- Function-Based Classifier"],"prefix":"10.1007","author":[{"given":"Sheng-Yu","family":"Peng","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Paul E.","family":"Hasler","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David V.","family":"Anderson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2009,2,11]]},"reference":[{"unstructured":"P. Hasler, P. D. Smith, D. Graham, R. Ellis, and D. V. Anderson, \u201cAnalog Floating-Gate, On-Chip Auditory Sensing System Interfaces,\u201d in IEEE J. Sensors, vol. 5, no. 5, pp.1027\u20131034, Oct. 2005.","key":"3_CR1_3"},{"doi-asserted-by":"crossref","unstructured":"M. Ogawa, K. Ito, and T. Shibata, \u201cA general-purpose vector-quantization processor employing two-dimensional bit-propagating winner-take-all,\u201d in Symposium on VLSI Circuits, pp.244\u2013247, 13\u201315 June 2002.","key":"3_CR2_3","DOI":"10.1109\/VLSIC.2002.1015095"},{"unstructured":"M. Bracco, S. Ridella, and R. Zunino, \u201cDigital Implementation of Hierarchical Vector Quantization,\u201d in IEEE Trans. Neural Networks, vol. 14, no. 5, pp.1072\u20131084, Sep. 2003.","key":"3_CR3_3"},{"unstructured":"G. Cauwenberghs and V. Pedron, \u201cA low-power CMOS analog vector quantizer,\u201d in IEEE J. Solid-State Circuits, vol. 32, no. 8, pp. 1278\u20131283, Aug. 1997.","key":"3_CR4_3"},{"doi-asserted-by":"crossref","unstructured":"P. Hasler, P. Smith, C. Duffy, C. Gordon, J. Dugger, D. Anderson, \u201cA floating-gate vector-quantizer,\u201d in Midwest Symposium on Circuits and Systems, Vol.1,4\u20137, Aug. 2002, pp. I-196\u20139.","key":"3_CR5_3","DOI":"10.1109\/MWSCAS.2002.1187190"},{"unstructured":"T. Yamasaki and T. Shibata, \u201cAnalog soft-pattern-matching classifier using floating-gate MOS technology,\u201d in IEEE Trans. Neural Networks, vol. 14, no. 5, pp. 1257\u20131265, Sep. 2003.","key":"3_CR6_3"},{"key":"3_CR7_3","volume-title":"Proc. Int. Neural Network Society","author":"T. Delbruck","year":"1991.","unstructured":"7. T. Delbruck, \u201cBump circuits for computing similarity and dissimilarity of analog voltage,\u201d in Proc. Int. Neural Network Society, Seattle, WA, 1991."},{"doi-asserted-by":"crossref","unstructured":"S. S. Watkins and P. M. Chau, \u201cA radial basis function neurocomputer implemented with analog VLSI circuits,\u201d in Int. Joint Conf. Neural Networks, 1992, vol. 2, pp. 607V612.","key":"3_CR8_3","DOI":"10.1109\/IJCNN.1992.226921"},{"doi-asserted-by":"crossref","unstructured":"J. Choi, B. J. Sheu, and J. C.-F. Chang, \u201cA Gaussian synapse circuit for analog neural networks,\u201d in IEEE Trans. VLSI Syst., vol. 2, pp. 129V133, Mar. 1994.","key":"3_CR9_3","DOI":"10.1109\/92.273156"},{"doi-asserted-by":"crossref","unstructured":"S.-Y. Lin, R.-J. Huang, and T.-D. Chiueh, \u201cA Tunable Gaussian\/Square Function Computation Circuit for Analog Neural Networks\u201d in IEEE Transactions on Circuits and System II, vol. 45, no. 3, 1998, pp. 441\u2013446.","key":"3_CR10_3","DOI":"10.1109\/82.664259"},{"key":"3_CR11_3","first-page":"454","volume-title":"Intelligent Control, 2002. Proceedings of the 2002 IEEE International Symposium on","author":"D. S. Masmoudi","year":"2002","unstructured":"11. D. S. Masmoudi, A. T. Dieng, and M. Masmoudi, \u201cA subthreshold mode programmable implementation of the Gaussian function for RBF neural networks applications\u201d, in Intelligent Control, 2002. Proceedings of the 2002 IEEE International Symposium on, Vancouver, Cananda, Oct. 2002, pp. 454\u2013459."},{"unstructured":"D. Hsu, M. Figueroa, and C. Diorio, \u201cA silicon primitive for competitive learning,\u201d in Conference on Neural Information Processing Systems, Dec. 2000.","key":"3_CR12_3"},{"doi-asserted-by":"crossref","unstructured":"P. Hasler, \u201cContinuous-Time Feedback in Floating-Gate MOS Circuits,\u201d in IEEE Trans. Circuit and system II, Vol. 48, No. 1, pp. 56\u201364, Jan. 2001.","key":"3_CR13_3","DOI":"10.1109\/82.913187"},{"doi-asserted-by":"crossref","unstructured":"M. Kucic, A. Low, P. Hasler, and J. Neff, \u201cA programmable continuous-time floating-gate Fourier processor,\u201d in IEEE Trans. Circuit and system II, pp. 90\u201399, Jan. 2001.","key":"3_CR14_3","DOI":"10.1109\/82.913191"},{"unstructured":"A. Bandyopadhyay, G.J. Serrano, and P. Hasler, \u201cAdaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades,\u201d in IEEE J. Solid-State Circuits, vol. 41, no. 9, pp.2107\u20132114, Sept. 2006.","key":"3_CR15_3"},{"doi-asserted-by":"crossref","unstructured":"P. Hasler and J. Dugger, \u201cCorrelation Learning Rule in Floating-Gate pFET Synapses,\u201d in IEEE Trans. Circuit and system II, vol. 48, no. 1, pp.65\u201373, Jan. 2001.","key":"3_CR16_3","DOI":"10.1109\/82.913188"},{"doi-asserted-by":"crossref","unstructured":"V. Srinivasan, G. J. Serrano, J. Gray, and P. Hasler, \u201cA precision cmos amplifier using floating-gates for offset cancellation,\u201d in Proc. CICC05, Sept. 2005, pp. 734737.","key":"3_CR17_3","DOI":"10.1109\/CICC.2005.1568774"},{"unstructured":"J. Glossner, K. Chirca, M. Schulte, H. Wang, N. Nasimzada, D. Har, S. Wang, A. J. Hoane, G. Nacer, M. Moudgill, M. S. Vassiliadis, \u201cSandblaster low power DSP,\u201d in IEEE Prec. Custom Integrated Circuits Conference, pp.575\u2013581, oct. 2004.","key":"3_CR18_3"},{"doi-asserted-by":"crossref","unstructured":"R. Chawla, A. Bandyopadhyay, V. Srinivasan, and P. Hasler, \u201cA 531nW\/MHz, 128\u00d732 current-mode programmable analog vector-matrix multiplier with over two decades of linearity,\u201d in IEEE Prec. Custom Integrated Circuits Conference, pp.651\u2013654, oct. 2004.","key":"3_CR19_3","DOI":"10.1109\/CICC.2004.1358910"},{"unstructured":"R. Karakiewicz, R. Genov, A. Abbas, and G. Cauwenberghs, \u201c175 GMACS\/mW Charge-Mode Adiabatic Mixed-Signal Array Processor,\u201d in Symposium on VLSI Circuits, June, 2006.","key":"3_CR20_3"}],"container-title":["IFIP \u2013 The International Federation for Information Processing","VLSI-SoC: Advanced Topics on Systems on a Chip"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-0-387-89558-1_3.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,11]],"date-time":"2025-02-11T17:31:49Z","timestamp":1739295109000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-0-387-89558-1_3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009]]},"ISBN":["9780387895574","9780387895581"],"references-count":20,"URL":"https:\/\/doi.org\/10.1007\/978-0-387-89558-1_3","relation":{},"ISSN":["1571-5736"],"issn-type":[{"type":"print","value":"1571-5736"}],"subject":[],"published":{"date-parts":[[2009]]}}}