{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T03:27:24Z","timestamp":1725506844166},"publisher-location":"Boston, MA","reference-count":57,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9781402081569"},{"type":"electronic","value":"9781402081576"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-1-4020-8157-6_17","type":"book-chapter","created":{"date-parts":[[2008,4,7]],"date-time":"2008-04-07T16:54:40Z","timestamp":1207587280000},"page":"175-189","source":"Crossref","is-referenced-by-count":0,"title":["From the University of Illinois VIA JPL and UCLA to Vytautas Magnus University: 50 Years of Computer Engineering by Algirdas Avi\u017dienis"],"prefix":"10.1007","author":[{"given":"David A.","family":"Rennels","sequence":"first","affiliation":[]},{"given":"Milo\u0161 D.","family":"Ercegovac","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"issue":"8","key":"17_CR1","doi-asserted-by":"publisher","first-page":"720","DOI":"10.1109\/T-C.1970.223022","volume":"C-19","author":"D. E. Atkins","year":"1970","unstructured":"Atkins, D. E., Design of the Arithmetic Units of ILLIAC III: Use of Redundancy and Higher Radix Methods\u201d, IEEE Transactions on Computers, C-19(8):720\u2013733, August 1970.","journal-title":"IEEE Transactions on Computers"},{"key":"17_CR2","unstructured":"Avi\u017eienis, A., A Study of Redundant Number Representations for Parallel Digital Computers, Ph.D. Thesis, University of Illinois, Urbana, 1960."},{"issue":"9","key":"17_CR3","doi-asserted-by":"publisher","first-page":"389","DOI":"10.1109\/TEC.1961.5219227","volume":"EC-10","author":"A. Avi\u017eienis","year":"1961","unstructured":"Avi\u017eienis, A., Signed Digit Number Representations for Fast Parallel Arithmetic, IRE Transactions on Electronic Computers, EC-10(9): 389\u2013400, September 1961.","journal-title":"IRE Transactions on Electronic Computers"},{"key":"17_CR4","series-title":"Technical Report","volume-title":"A Study of the Effectiveness of Fault-Detecting Codes for Binary Arithmetic","author":"A. Avi\u017eienis","year":"1965","unstructured":"Avi\u017eienis, A., A Study of the Effectiveness of Fault-Detecting Codes for Binary Arithmetic, Jet Propulsion Laboratory, Pasadena, California, Technical Report 32-711, September 1, 1965."},{"key":"17_CR5","unstructured":"Avi\u017eienis, A., On flexible implementation of digital computer arithmetic, Proc. IFIP Congress, pp. 664\u2013670, 1962."},{"issue":"12","key":"17_CR6","doi-asserted-by":"crossref","first-page":"1910","DOI":"10.1109\/PROC.1966.5274","volume":"54","author":"A. Avi\u017eienis","year":"1966","unstructured":"Avi\u017eienis, A., Arithmetic microsystems for the synthesis of function generators, Proc. of the IEEE, 54(12):1910\u20131919, December 1966.","journal-title":"Proc. of the IEEE"},{"key":"17_CR7","doi-asserted-by":"crossref","unstructured":"Avi\u017eienis, A., Binary-compatible signed-digit arithmetic, Proc. Fall Joint Computer Conference, pp. 663\u2013672, 1964.","DOI":"10.1145\/1464052.1464115"},{"issue":"8","key":"17_CR8","doi-asserted-by":"publisher","first-page":"733","DOI":"10.1109\/T-C.1970.223023","volume":"C-19","author":"A. Avi\u017eienis","year":"1970","unstructured":"Avi\u017eienis, A. and C. Tung, A Universal Arithmetic Building Element (ABE) and Design Methods for Arithmetic Processors, IEEE Transactions on Computers, C-19(8):733\u2013745, August 1970.","journal-title":"IEEE Transactions on Computers"},{"key":"17_CR9","unstructured":"Avi\u017eienis, A., Digital Computer Arithmetic: A Unified Algorithmic Specification, Proceedings Symposium on Computers and Automata, pp. 509\u2013525, April 1971."},{"issue":"II","key":"17_CR10","doi-asserted-by":"publisher","first-page":"1312","DOI":"10.1109\/T-C.1971.223133","volume":"C-20","author":"A. Avi\u017eienis","year":"1971","unstructured":"Avi\u017eienis, A., Gilley, G. C, Mathur, F. P., Rennels, D. A., Rohr, J. A, Rubin, D. K., The STAR (Self-Testing-and-Repairing)Computer: An Investigation of the Theory and Practice of Fault-Tolerant Computer Design, IEEE Trans. on Computers, Vol. C-20,No. II, November 1971, pp. 1312\u20131321: also in Digest of the 1971 International Symposium on Fault-Tolerant Computing, Pasadena, CA, March 1971, pp. 92\u201396.","journal-title":"IEEE Trans. on Computers"},{"issue":"II","key":"17_CR11","doi-asserted-by":"publisher","first-page":"1322","DOI":"10.1109\/T-C.1971.223134","volume":"C-20","author":"A. Avi\u017eienis","year":"1971","unstructured":"Avi\u017eienis, A., Arithmetic Error Codes: Cost and Effectiveness Studies for Application in Digital System Design, IEEE Trans. on Computers, Vol. C-20,No. II, November 1971, pp. 1322\u20131330: also in Digest of the 1971 International Symposium on Fault-Tolerant Computing, Pasadena, CA, March 1971, pp. 118\u2013121.","journal-title":"IEEE Trans. on Computers"},{"issue":"I","key":"17_CR12","doi-asserted-by":"crossref","first-page":"5","DOI":"10.1109\/C-M.1971.216738","volume":"4","author":"A. Avi\u017eienis","year":"1971","unstructured":"Avi\u017eienis, A., Fault-Tolerant Computing An Overview, IEEE Computer, Vol. 4,No. I, February 1971, pp. 5\u20138.","journal-title":"IEEE Computer"},{"issue":"11","key":"17_CR13","doi-asserted-by":"publisher","first-page":"1322","DOI":"10.1109\/T-C.1971.223134","volume":"C-20","author":"A. Avi\u017eienis","year":"1971","unstructured":"Avi\u017eienis, A., Arithmetic Error Codes:\u2019 Cost and Effectiveness Studies for Application in Digital System Design, IEEE Transactions on Computers, C-20(11):1322\u20131331, November 1971.","journal-title":"IEEE Transactions on Computers"},{"key":"17_CR14","unstructured":"Avi\u017eienis, A., Rennels, D. A., Fault-Tolerance Experiments With The JPL STAR Computer, in Digest of COMPCON\u2019 72 (Sixth Annual IEEE Computer Society Int. Conf.), San Francisco, California, 1972, pp. 321\u2013324."},{"issue":"6","key":"17_CR15","doi-asserted-by":"publisher","first-page":"567","DOI":"10.1109\/TC.1973.5009108","volume":"C-22","author":"A. Avi\u017eienis","year":"1973","unstructured":"Avi\u017eienis, A., Arithmetic Algorithms for Error-Coded Operands, IEEE Trans. on Computers, C-22(6):567\u2013572, June 1973; also in Digest of FTCS-2, the 2nd International Symposium on Fault-Tolerant Computing, Newton, MA, June 1972, pp. 25\u201329.","journal-title":"IEEE Trans. on Computers"},{"key":"17_CR16","unstructured":"Avi\u017eienis, A., Parhami, B., A Fault-Tolerant Parallel Computer System for Signal Processing, Digest of FTCS-4, the 4th International Symposium on Fault-Tolerant Computing, Champaign, IL., June 1974, pp. 2-8\u20132-13."},{"key":"17_CR17","doi-asserted-by":"crossref","unstructured":"A. Avi\u017eienis, Redundancy in number representations as an aspect of computational complexity of arithmetic functions, Proc. 3rd IEEE Symposium on Computer Arithmetic, pp. 87\u201389, 1975.","DOI":"10.1109\/ARITH.1975.6156970"},{"key":"17_CR18","unstructured":"Avi\u017eienis, A., Ercegovac, M., Lang, T., Sylvain, P., Thomasian, A., An Investigation of Fault-Tolerant Architectures for Large-Scale Numerical Computing, Proceedings of the Symposium on High-Speed Computer & Algorithm Organization, University of Illinois at Urbana-Champaign, April 1977, Academic Press, pp. 173\u2013178."},{"key":"17_CR19","unstructured":"Avi\u017eienis, A., Chen, L., On the Implementation of N-version Programming for Software Fault Tolerance During Execution, Proceedings COMPSAC 77, (First IEEE-CS International Computer Software and Applications Conference), Chicago, November 1977, pp. 149\u2013155."},{"key":"17_CR20","unstructured":"Avi\u017eienis, A., Bond, J. W. III, Fault Tolerance in Large Computing Systems, Proceedings of the 3rd Jerusalem Conference on Information Technology, Jerusalem, August 1978, pp. 9\u201316."},{"key":"17_CR21","unstructured":"A. Avi\u017eienis, Low-cost residue and inverse residue error-detecting codes for signed-digit arithmetic, Proc. 5th IEEE Symposium on Computer Arithmetic, pp. 165\u2013168, 1981."},{"key":"17_CR22","doi-asserted-by":"crossref","unstructured":"A. Avi\u017eienis and C. S. Raghavendra, Applications for arithmetic error codes in large, high-performance computers, Proc. 6th IEEE Symposium on Computer Arithmetic, pp. 169\u2013173, 1983.","DOI":"10.1109\/ARITH.1983.6158066"},{"issue":"8","key":"17_CR23","doi-asserted-by":"publisher","first-page":"67","DOI":"10.1109\/MC.1984.1659219","volume":"17","author":"A. Avi\u017eienis","year":"1984","unstructured":"Avi\u017eienis, A., Kelly, J. P. J., Fault Tolerance by Design Diversity: Concepts and Experiments, Computer, Vol. 17,No. 8, August 1984, pp. 67\u201380.","journal-title":"Computer"},{"key":"17_CR24","doi-asserted-by":"crossref","unstructured":"Avi\u017eienis, A., Arithmetic algorithms for operands encoded in two-dimensional low-cost arithmetic codes, Proc. 7th IEEE Symposium on Computer Arithmetic, pp. 285\u2013292, 1985.","DOI":"10.1109\/ARITH.1985.6158928"},{"key":"17_CR25","unstructured":"Avi\u017eienis, A., Gunningberg, P., Kelly, J. P. J., Strigini, L., Traverse, P. J., Tso, K. S., Voges, U., The UCLA DEDIX system: a Distributed Testbed for Multiple-Version Software, Digest of FTCS-15, the 15th International Symposium on Fault-Tolerant Computing, Ann Arbor, Michigan, June 1985, pp. 126\u2013134."},{"key":"17_CR26","unstructured":"Avi\u017eienis, A., Two-Dimensional Low-Cost Arithmetic Residue Codes: Effectiveness and Arithmetic Algorithms, Digest of FTCS-16, the 16th International Symposium on Fault-Tolerant Computing, Vienna, Austria, July 1986, pp. 330\u2013336."},{"issue":"2","key":"17_CR27","doi-asserted-by":"publisher","first-page":"84","DOI":"10.1109\/MC.1987.1663482","volume":"20","author":"A. Avi\u017eienis","year":"1987","unstructured":"Avi\u017eienis, A., Ball, D. E., On the Achievement of a Highly Dependable and Fault-Tolerant Air Traffic Control System, Computer, Vol. 20,No. 2, February 1987, pp. 84\u201390.","journal-title":"Computer"},{"key":"17_CR28","unstructured":"Avi\u017eienis, A., A FaultTolerance Infrastructure for Dependable Computing with High-Performance Components, Digest International Conference on Dependable Systems andNetworks, DSN 2000, New York, June 25\u201328, 2000, pp. 81\u201386."},{"key":"17_CR29","unstructured":"Baqai, I., Lang, T., Reliability Aspects of the ILLIACIV Computer, Proceedings of the 1976 International Conference on Parallel Processing, August 1976, pp. 123\u2013131."},{"issue":"3","key":"17_CR30","doi-asserted-by":"publisher","first-page":"291","DOI":"10.1145\/319989.319990","volume":"8","author":"A. F. Cardenas","year":"1983","unstructured":"Cardenas, A. F., Alavian, F., Avi\u017eienis, A., Performance of Recovery Architectures in Parallel Associative Database Processors, ACM Transactions on Database Systems, Vol. 8,No. 3, September 1983, pp. 291\u2013323.","journal-title":"ACM Transactions on Database Systems"},{"key":"17_CR31","volume-title":"Digital Arithmetic","author":"M.D. Ercegovac","year":"2004","unstructured":"Ercegovac, M.D. and T. Lang, Digital Arithmetic, Morgan Kaufmann Publishers, San Francisco, 2004."},{"key":"17_CR32","unstructured":"Gilley, G. C., A Fault-Tolerant Spacecraft, Digest of FTCS-2, the 2nd International Symposium on Fault-Tolerant Computing, Newton, MA, June 1972, pp. 105\u2013109."},{"key":"17_CR33","unstructured":"Gorji-Sinaki, A., Error-Coded Algorithms for On-Line Arithmetic, PhD Thesis, University of California, Los Angeles."},{"key":"17_CR34","unstructured":"Grnarov, A., Kleinrock, L., Gerla, M., A Highly Reliable Distributed Loop Architecture, Digest of FTCS-IO, the 10th International Symposium on Fault-Tolerant Computing, Kyoto, Japan, October 1980, pp. 319\u2013324."},{"key":"17_CR35","first-page":"571","volume-title":"Proceedings of the 11th Annual Pittsburgh Modeling & Simulation Conference","author":"A. Grnarov","year":"1980","unstructured":"Grnarov, A., Arlat, J., Avi\u017eienis, A., Modeling of Software Fault-Tolerance Strategies, Proceedings of the 11th Annual Pittsburgh Modeling & Simulation Conference, University of Pittsburgh, Pennsylvania, Vol. II, Part 2, May 1980, pp. 571\u2013578."},{"key":"17_CR36","unstructured":"Kelly, J. P. J., Avi\u017eienis. A., A Specification-oriented Multi-version Software Experiment, Digest of FTCS-13, the 13th International Symposium on Fault-Tolerant Computing, Milano, Italy, June 1983, pp. 120\u2013126."},{"key":"17_CR37","doi-asserted-by":"crossref","unstructured":"Kelly, J. P.J. et al., A Large Scale Second Generation Experiment in Multi-Version Software: Description and Early Results, Digest of FTCS 28, International Symposium on Fault-Tolerant Computing, Tokyo, Japan, June 27\u201330, pp. 9\u201314.","DOI":"10.1109\/FTCS.1988.5290"},{"key":"17_CR38","unstructured":"Korff, P., A Multiaccess Memory, Ph.D. thesis, UCLA Computer Science Department, University of California, Los Angeles, June 1976; also Technical Report UCLA-ENG-7607, July 1976."},{"issue":"7","key":"17_CR39","doi-asserted-by":"publisher","first-page":"609","DOI":"10.1109\/TC.1982.1676058","volume":"C-31","author":"T. E. Mangir","year":"1982","unstructured":"Mangir, T. E., Avi\u017eienis, A., Fault-Tolerant Design for VLSI: Effect of Interconnect Requirements on Yield Improvement of VLSI Designs, IEEE Transactions on Computers, Vol. C-31,No. 7, July 1982, pp. 609\u2013616.","journal-title":"IEEE Transactions on Computers"},{"issue":"II","key":"17_CR40","doi-asserted-by":"publisher","first-page":"1376","DOI":"10.1109\/T-C.1971.223142","volume":"C-20","author":"F. P. Mathur","year":"1971","unstructured":"Mathur, F. P., On Reliability Modeling and Analysis of Ultra-Reliable Fault-Tolerant Digital Systems, IEEE Transactions on Computers, Vol. C-20,No. II, November 1971, pp. 1376\u20131382.","journal-title":"IEEE Transactions on Computers"},{"issue":"II","key":"17_CR41","first-page":"1002","volume":"C-29","author":"Y. W. Ng","year":"1980","unstructured":"Ng, Y. W., Avi\u017eienis, A., A Unified Reliability Model for Fault-Tolerant Computers, IEEE Transactions on Computers, Vol. C-29,No. II, pp. 1002\u20131011, November 1980.","journal-title":"IEEE Transactions on Computers"},{"key":"17_CR42","unstructured":"Oklobdzija, V. G., Ercegovac, M. D., Testability Enhancement of VLSI Using Circuit Structures, Proceedings of IEEE 1982 International Conference on Circuits and Computers, New York, 1982."},{"key":"17_CR43","unstructured":"Parhami, B. and A. Avi\u017eienis, Application of arithmetic error codes for checking mass memories, Digest of FTCS-3, the 3rd Int. Symposium on Fault-Tolerant Computing, pp. 47\u201351, June 1973."},{"issue":"4","key":"17_CR44","doi-asserted-by":"publisher","first-page":"302","DOI":"10.1109\/TC.1978.1675102","volume":"C-27","author":"B. Parhami","year":"1978","unstructured":"Parhami, B. and A. Avi\u017eienis, Detection of storage errors in mass memories using low-cost arithmetic codes, IEEE Transactions on Computers, C-27(4):302\u2013308, April 1978.","journal-title":"IEEE Transactions on Computers"},{"issue":"6","key":"17_CR45","doi-asserted-by":"publisher","first-page":"568","DOI":"10.1109\/TC.1984.1676483","volume":"C-33","author":"C. S. Raghavendra","year":"1984","unstructured":"Raghavendra, C. S., Avi\u017eienis, A., Ercegovac, M. D., Fault Tolerance in Binary Tree Architectures, IEEE Transactions on Computers, Vol. C-33,No. 6, June 1984, pp. 568\u2013572.","journal-title":"IEEE Transactions on Computers"},{"key":"17_CR46","unstructured":"Rennels, D. A., Avi\u017eienis, A., RMS: A Reliability Modeling System for Self-Repairing Computers, Digest of FTCS-3, the 3rd International Symposium on Fault-Tolerant Computing, June 1973, pp. 131\u2013135."},{"key":"17_CR47","unstructured":"Rennels, D. A., Avi\u017eienis, A., Ercegovac, M., A Study of Standard Building Blocks for the Design of Fault-Tolerant Distributed Computer Systems, Digest of FTCS-8, the 8th International Symposium on Fault-Tolerant Computing, Toulouse, France, June 1978, pp. 144\u2013149."},{"issue":"3","key":"17_CR48","doi-asserted-by":"crossref","first-page":"88","DOI":"10.1109\/TEC.1958.5222579","volume":"EC-7","author":"J. E. Robertson","year":"1958","unstructured":"J. E. Robertson, A New Class of Digital Division Methods, IRE Transactions Electronic Computers, EC-7(3):88\u201392, September 1958.","journal-title":"IRE Transactions Electronic Computers"},{"key":"17_CR49","unstructured":"Robertson, J. E., Introduction to Digital Computer Arithmetic, Department of Computer Science, University of Illinois at Urbana-Champaign, File No. 599, 1964."},{"key":"17_CR50","unstructured":"Robertson, J. E., Arithmetic unit (Chapter 8) in On the design of very highspeed computer, Computer Science Department, University of Illinois at Urbana-Champaign, Technical Report No. 80, 1957"},{"key":"17_CR51","unstructured":"Rohr, J. A., STAREX Self-Repair Routines: Software Recovery in The JPL-STAR Computer, Digest of FTCS-3, the 3rd International Symposium on Fault-Tolerant Computing, Palo Alto, California, June 1973, pp. 11\u201316."},{"key":"17_CR52","unstructured":"Sievers, M., Avi\u017eienis, A., Analysis of a Class of Totally Self-Checking Functions Implemented in a MOS LSI General Logic Structure, Digest of FTCS-11, the 11th International Symposium on Fault-Tolerant Computing, Portland, Maine, June 1981, pp. 256\u2013261."},{"key":"17_CR53","doi-asserted-by":"crossref","unstructured":"Slekys, A. G. and A. Avi\u017eienis, A modified bi-imaginary number system, Proc. 4th IEEE Symposium on Computer Arithmetic, pp. 48\u201355, 1978.","DOI":"10.1109\/ARITH.1978.6155756"},{"key":"17_CR54","doi-asserted-by":"crossref","unstructured":"Sylvain, P., Vineberg, M., The Design and Evaluation of the Array Machine: A High-Level Language Processor, Proceedings of Second Annual Symposium on Computer Architecture, Houston, TX, January 1975, pp. 119\u2013125.","DOI":"10.1145\/642089.642110"},{"key":"17_CR55","doi-asserted-by":"crossref","unstructured":"Tung, C. and Avi\u017eienis, A., Combinational arithmetic systems for the approximation of functions, AFIPS Conference Proceedings 1970 Spring Joint Computer Conference, pp. 95\u2013107, 1970.","DOI":"10.1145\/1476936.1476958"},{"key":"17_CR56","unstructured":"Vineberg, M., Avi\u017eienis, A., Implementation of a Higher \u2014 Level Language on an Array Machine, Proceedings of the International Workshop on Computer Architecture, Grenoble, France, June 1973."},{"key":"17_CR57","unstructured":"Wang, S. L., Avi\u017eienis, A., The Design,of Totally Self-Checking Circuits Using Programmable Logic Arrays, Digest of FTCS-9, the 9th International Symposium on Fault-Tolerant Computing, Madison, WI, June 1979, pp. 173\u2013180."}],"container-title":["IFIP International Federation for Information Processing","Building the Information Society"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-1-4020-8157-6_17.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,29]],"date-time":"2021-04-29T05:08:03Z","timestamp":1619672883000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-1-4020-8157-6_17"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9781402081569","9781402081576"],"references-count":57,"URL":"https:\/\/doi.org\/10.1007\/978-1-4020-8157-6_17","relation":{},"subject":[]}}