{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T08:28:12Z","timestamp":1725524892021},"publisher-location":"Dordrecht","reference-count":13,"publisher":"Springer Netherlands","isbn-type":[{"type":"print","value":"9781402098222"},{"type":"electronic","value":"9781402098239"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1007\/978-1-4020-9823-9_10","type":"book-chapter","created":{"date-parts":[[2009,2,17]],"date-time":"2009-02-17T10:58:58Z","timestamp":1234868338000},"page":"131-144","source":"Crossref","is-referenced-by-count":8,"title":["Transparent IP Cores Integration Based on the Distributed Object Paradigm"],"prefix":"10.1007","author":[{"given":"Fernando","family":"Rinc\u00f3n","sequence":"first","affiliation":[]},{"given":"Jes\u00fcs","family":"Barba","sequence":"additional","affiliation":[]},{"given":"Francisco","family":"Moya","sequence":"additional","affiliation":[]},{"given":"F\u00f9lix J","family":"Villanueva","sequence":"additional","affiliation":[]},{"given":"David","family":"Villa","sequence":"additional","affiliation":[]},{"given":"Julio","family":"Dondo","sequence":"additional","affiliation":[]},{"given":"Juan Carlos","family":"L\u00f3pez","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"10_CR1","unstructured":"Opencores; http:\/\/www.opencores.org ); last visited June, 27, 2008."},{"key":"10_CR2","unstructured":"Open Core Protocol (OCP); http:\/\/www.ocpip.org , last visited June, 27, 2008."},{"key":"10_CR3","unstructured":"Internet Communication Engine (ICE); http:\/\/zeroc.com , las t visited June, 27, 2008."},{"key":"10_CR4","doi-asserted-by":"crossref","unstructured":"Keutzer, K., Newton, A.R., Rabaey, J.M., and Sangiovanni-Vincentelli, A. System-level design: orthogonalization of concerns and platform-based design. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, 19, 12 (Dec. 2000).","DOI":"10.1109\/43.898830"},{"key":"10_CR5","doi-asserted-by":"crossref","unstructured":"W. Cesario, L. Gauthier, D. Lyonnard, G. Nicolescu, and A.A. Jerraya. Object-based hardware\/software component interconnection model for interface design in system-ona- chip circuits. The Journal of Systems and Software, 70, 2004.","DOI":"10.1016\/S0164-1212(03)00071-2"},{"key":"10_CR6","doi-asserted-by":"crossref","unstructured":"A. Gerstlauer, D. Shin, R. Dmer, and D. D. Gajski. System-level communication modeling for network-on-chip synthesis. In Proceedings of theASP-DAC, 2004.","DOI":"10.1145\/1120725.1120740"},{"key":"10_CR7","doi-asserted-by":"crossref","unstructured":"J-Y. Mignolet, V. Nollet, P. Coene, D. Verkest, S. Vernalde, and R. Lauwereins. Infrastructure for design and management of relocatable tasks in a heterogeneous reconfigurable system-on-chip. In Proceedings of the DATE \u201903 Conference, 2003.","DOI":"10.1109\/DATE.2003.1253733"},{"key":"10_CR8","volume-title":"Distributed object models for multi-processor SoC\u2019s, with application to low-power multimedia wireless systems. In Proceedings of the DATE \u201906 Conference","author":"P.G. Paulin","year":"2006","unstructured":"P.G. Paulin, C. Pilkington, M. Langevin, E. Bensoudane, O. Benny, D. Lyonnard, B. Lavigueur, and D. Lo. Distributed object models for multi-processor SoC\u2019s, with application to low-power multimedia wireless systems. In Proceedings of the DATE \u201906 Conference, Munich, Germany, 2006."},{"key":"10_CR9","doi-asserted-by":"crossref","unstructured":"R. Hecht, S. Kubish, H. Michelsen, E. Zeeb, and D. Timmermann. A distributed object system approach for dynamic reconfiguration. In Reconfigurable Architectures Workshop (RAW 06), Rhodos, Greece, April 2006.","DOI":"10.1109\/IPDPS.2006.1639448"},{"key":"10_CR10","unstructured":"V. D\u2019silva, S. Ramesh, and A. Sowmya. Bridge over troubled wrappers: Automated interface synthesis. In Proceedings of the Intl. Conf. on VLSI Design, 2004."},{"key":"10_CR11","unstructured":"A. Gerstlauer. Communication abstractions for system-level design and synthesis. Technical Report CECS-TR-03-30, UC Irvine, 2003."},{"key":"10_CR12","doi-asserted-by":"crossref","unstructured":"Grimpe, E., and Oppenheimer, F. Extending the SystemC Synthesis Subset by Object- Oriented Features. In Proceedings of CODES+ISSS, Oct. 2003.","DOI":"10.1145\/944650.944652"},{"key":"10_CR13","unstructured":"Schulz-Key, C., Winterholer, M., Schweizer, T., Kuhn, T., and Rosenstiel, W. Object- Oriented Modeling and Synthesis of SystemC Specifications. In Proceedings of theASPDAC, 2004."}],"container-title":["Lecture Notes in Electrical Engineering","Intelligent Technical Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-1-4020-9823-9_10.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,4,30]],"date-time":"2021-04-30T23:33:52Z","timestamp":1619825632000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-1-4020-9823-9_10"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"ISBN":["9781402098222","9781402098239"],"references-count":13,"URL":"https:\/\/doi.org\/10.1007\/978-1-4020-9823-9_10","relation":{},"ISSN":["1876-1100","1876-1119"],"issn-type":[{"type":"print","value":"1876-1100"},{"type":"electronic","value":"1876-1119"}],"subject":[]}}