{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,7]],"date-time":"2026-01-07T07:51:36Z","timestamp":1767772296598,"version":"3.40.3"},"publisher-location":"New York, NY","reference-count":10,"publisher":"Springer New York","isbn-type":[{"type":"print","value":"9781441964595"},{"type":"electronic","value":"9781441964601"}],"license":[{"start":{"date-parts":[[2010,11,9]],"date-time":"2010-11-09T00:00:00Z","timestamp":1289260800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2010,11,9]],"date-time":"2010-11-09T00:00:00Z","timestamp":1289260800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011]]},"DOI":"10.1007\/978-1-4419-6460-1_5","type":"book-chapter","created":{"date-parts":[[2010,11,23]],"date-time":"2010-11-23T22:06:01Z","timestamp":1290549961000},"page":"115-123","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":18,"title":["The Case for Message Passing on Many-Core Chips"],"prefix":"10.1007","author":[{"given":"Rakesh","family":"Kumar","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Timothy G.","family":"Mattson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gilles","family":"Pokam","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rob","family":"Van Der Wijngaart","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2010,11,9]]},"reference":[{"key":"5_CR1_5","volume-title":"Pentium Processor System Architecture","author":"D. Anderson","year":"1995","unstructured":"D. Anderson, T. Shanley, Pentium Processor System Architecture, Addison Wesley, MA, 1995"},{"issue":"3","key":"5_CR2_5","doi-asserted-by":"publisher","first-page":"323","DOI":"10.1145\/72551.72553","volume":"21","author":"N. Carriero","year":"1989","unstructured":"N. Carriero, D. Gelernter, How to Write Parallel Programs: A Guide to the Perplexed. ACM Computing Surveys, 21(3), pp. 323\u2013357, 1989","journal-title":"ACM Computing Surveys"},{"key":"5_CR3_5","doi-asserted-by":"publisher","first-page":"131","DOI":"10.1006\/jvlc.1996.0009","volume":"7","author":"T.R.G. Green","year":"1996","unstructured":"T.R.G. Green, M. Petre, Usability Analysis of visual Programming Environments: a \u201cCognitive Dimensions\u201d framework, Journal of Visual Languages and Computing, 7, pp. 131\u2013174, 1996","journal-title":"Journal of Visual Languages and Computing"},{"key":"5_CR4_5","unstructured":"J.P. Hoeflinger, B.R. de Supinski, The OpenMP memory model. In: Proceedings of the First International Workshop on OpenMP \u2013 IWOMP 2005, 2005"},{"key":"5_CR5_5","doi-asserted-by":"crossref","unstructured":"J. Howard, S. Dighe, Y. Hoskote, S. Vangal, D. Finan, G. Ruhl, D. Jenkins, H. Wilson, N. Borkar, G. Schrom, F. Pailet, S. Jain, T. Jacob, S. Yada, S. Marella, P. Salihundam, V. Erraguntla, M. Konow, M. Riepen, G. Droege, J. Lindemann, M. Gries, T. Apel, K. Henriss, T. Lund-Larsen, S. Steibl, S. Borkar, V. De1, R. Van Der Wijngaart, T. Mattson, A 48-Core IA-32 Message-Passing Processor with DVFS in 45nm CMOS, Proceedings of the International Solid-State Circuits Conference, Feb 2010","DOI":"10.1109\/ISSCC.2010.5434077"},{"key":"5_CR6_5","doi-asserted-by":"crossref","unstructured":"K. Keutzer, T.G. Mattson, A design pattern language for engineering (Parallel) software, Intel Technology Journal, pp. 6\u201319, 2009","DOI":"10.1145\/1953611.1953620"},{"key":"5_CR7_5","first-page":"321","volume-title":"Detecting Race Conditions in Parallel Programs that Use Semaphores, Algorithmica","author":"P.N. Klein","year":"2003","unstructured":"P.N. Klein, H-I Lu, R.H.B. Netzer, Detecting Race Conditions in Parallel Programs that Use Semaphores, Algorithmica, vol. 35, pp. 321\u2013345, Springer, Berlin, 2003"},{"issue":"5","key":"5_CR8_5","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1109\/MC.2006.180","volume":"29","author":"E.A. Lee","year":"2006","unstructured":"E.A. Lee, The problem with threads, IEEE Computer, 29(5), pp. 33\u201342, 2006","journal-title":"IEEE Computer"},{"key":"5_CR9_5","unstructured":"T.G. Mattson, B.A. Sanders, B.L. Massingill, Patterns for Parallel Programming, Addison Wesley software patterns series, 2004"},{"key":"5_CR10_5","doi-asserted-by":"crossref","DOI":"10.1201\/b17174","volume-title":"Introduction to Concurrency in Programming Languages","author":"M.J. Sottile","year":"2009","unstructured":"M.J. Sottile, T.G. Mattson, C.E Rasmussen, Introduction to Concurrency in Programming Languages, CRC, FL, 2009"}],"container-title":["Multiprocessor System-on-Chip"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-1-4419-6460-1_5","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,31]],"date-time":"2023-01-31T19:32:42Z","timestamp":1675193562000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-1-4419-6460-1_5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,11,9]]},"ISBN":["9781441964595","9781441964601"],"references-count":10,"URL":"https:\/\/doi.org\/10.1007\/978-1-4419-6460-1_5","relation":{},"subject":[],"published":{"date-parts":[[2010,11,9]]},"assertion":[{"value":"9 November 2010","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}