{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T18:06:41Z","timestamp":1725732401385},"publisher-location":"New York, NY","reference-count":86,"publisher":"Springer New York","isbn-type":[{"type":"print","value":"9781461468585"},{"type":"electronic","value":"9781461468592"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013]]},"DOI":"10.1007\/978-1-4614-6859-2_37","type":"book-chapter","created":{"date-parts":[[2013,6,19]],"date-time":"2013-06-19T12:35:53Z","timestamp":1371645353000},"page":"1215-1257","source":"Crossref","is-referenced-by-count":1,"title":["Software Compilation Techniques for MPSoCs"],"prefix":"10.1007","author":[{"given":"Rainer","family":"Leupers","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weihua","family":"Sheng","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jeronimo","family":"Castrillon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2013,5,10]]},"reference":[{"unstructured":"Eclipse. \n                  http:\/\/www.eclipse.org\/\n                  \n                . Visited on Jan. 2010","key":"37_CR1"},{"unstructured":"GDB: The GNU Project Debugger. \n                  http:\/\/www.gnu.org\/software\/gdb\/\n                  \n                . Visited on Jan. 2010","key":"37_CR2"},{"unstructured":"MCAPI - Multicore Communications API. \n                  http:\/\/www.multicore-association.org\/workgroup\/comapi.php\n                  \n                . Visited on Nov. 2009","key":"37_CR3"},{"unstructured":"PISA - A Platform and Programming Language Independent Interface for Search Algorithms. \n                  http:\/\/www.tik.ee.ethz.ch\/sop\/pisa\/\n                  \n                . Visited on Nov. 2009","key":"37_CR4"},{"unstructured":"Real Time Software Components. \n                  http:\/\/www.eclipse.org\/dsdp\/rtsc\n                  \n                . Visited on Jan. 2010","key":"37_CR5"},{"unstructured":"AbsInt: aiT worst-case execution time analyzers. \n                  http:\/\/www.absint.com\/ait\/\n                  \n                . Visited on Nov. 2009","key":"37_CR6"},{"unstructured":"ACE: Embedded C for high performance DSP programming with the CoSy compiler development system. a-qual.com\/topics\/2005\/EmbeddedCv2.pdf. Visited on Jan. 2010","key":"37_CR7"},{"issue":"10","key":"37_CR8","doi-asserted-by":"publisher","first-page":"24","DOI":"10.1145\/1189276.1189288","volume":"4","author":"A.R. Adl-Tabatabai","year":"2007","unstructured":"Adl-Tabatabai, A.R., Kozyrakis, C., Saha, B.: Unlocking concurrency. Queue 4(10), 24\u201333 (2007)","journal-title":"Unlocking concurrency. Queue"},{"key":"37_CR9","volume-title":"Compilers: Principles, Techniques, and Tools","author":"A.V. Aho","year":"1986","unstructured":"Aho, A.V., Sethi, R., Ullman, J.D.: Compilers: Principles, Techniques, and Tools. Addison-Wesley Longman Publishing Co., Inc., Boston, MA, USA (1986)"},{"key":"37_CR10","volume-title":"The landscape of parallel computing research: A view from Berkeley","author":"K. Asanovic","year":"2006","unstructured":"Asanovic, K., Bodik, R., Catanzaro, B.C., Gebis, J.J., Husbands, P., Keutzer, K., Patterson, D.A., Plishker, W.L., Shalf, J., Williams, S.W., Yelick, K.A.: The landscape of parallel computing research: A view from Berkeley. Tech. rep., EECS Department, University of California, Berkeley (2006)"},{"doi-asserted-by":"crossref","unstructured":"Bacivarov, I., Haid, W., Huang, K., Thiele, L.: Methods and tools for mapping process networks onto multi-processor systems-on-chip. In: S.S. Bhattacharyya, E.F. Deprettere, R.\u00a0Leupers, J.\u00a0Takala (eds.) Handbook of Signal Processing Systems, second edn. Springer (2013)","key":"37_CR11","DOI":"10.1007\/978-1-4614-6859-2_27"},{"doi-asserted-by":"crossref","unstructured":"Benini, L., Bertozzi, D., Guerri, A., Milano, M.: Allocation and scheduling for MPSoCs via decomposition and no-good generation. Principles and Practices of Constrained Programming - CP 2005 (DEIS-LIA-05-001), 107\u2013121 (2005)","key":"37_CR12","DOI":"10.1007\/11564751_11"},{"issue":"10","key":"37_CR13","doi-asserted-by":"publisher","first-page":"2408","DOI":"10.1109\/78.950795","volume":"49","author":"B. Bhattacharya","year":"2001","unstructured":"Bhattacharya, B., Bhattacharyya, S.S.: Parameterized dataflow modeling for DSP systems. IEEE Transactions on Signal Processing 49(10), 2408\u20132421 (2001)","journal-title":"IEEE Transactions on Signal Processing"},{"doi-asserted-by":"crossref","unstructured":"Bhattacharyya, S.S., Deprettere, E.F., Theelen, B.: Dynamic dataflow graphs. In: S.S. Bhattacharyya, E.F. Deprettere, R.\u00a0Leupers, J.\u00a0Takala (eds.) Handbook of Signal Processing Systems, second edn. Springer (2013)","key":"37_CR14","DOI":"10.1007\/978-1-4614-6859-2"},{"doi-asserted-by":"crossref","unstructured":"Carro, L., Rutzig, M.B.: Multicore systems on chip. In: S.S. Bhattacharyya, E.F. Deprettere, R.\u00a0Leupers, J.\u00a0Takala (eds.) Handbook of Signal Processing Systems, second edn. Springer (2013)","key":"37_CR15","DOI":"10.1007\/978-1-4614-6859-2_17"},{"unstructured":"Castrillon, J., Leupers, R., Ascheid, G.: MAPS: Mapping concurrent dataflow applications to heterogeneous MPSoCs. IEEE Transactions on Industrial Informatics p.\u00a019 (2011). DOI\u00a010.1109\/TII.2011.2173941","key":"37_CR16"},{"unstructured":"Castrillon, J., Shah, A., Murillo, L., Leupers, R., Ascheid, G.: Backend for virtual platforms with hardware scheduler in the MAPS framework. In: Circuits and Systems (LASCAS), 2011 IEEE Second Latin American Symposium on, pp.\u00a01\u20134 (2011). DOI\u00a010.1109\/LASCAS.2011.5750280","key":"37_CR17"},{"doi-asserted-by":"crossref","unstructured":"Castrillon, J., Sheng, W., Leupers, R.: Trends in embedded software synthesis. In: SAMOS, pp.\u00a0347\u2013354 (2011)","key":"37_CR18","DOI":"10.1109\/SAMOS.2011.6045483"},{"key":"37_CR19","volume-title":"Task management in MPSoCs: An ASIP approach","author":"J. Castrillon","year":"2009","unstructured":"Castrillon, J., Zhang, D., Kempf, T., Vanthournout, B., Leupers, R., Ascheid, G.: Task management in MPSoCs: An ASIP approach. In: ICCAD 2009 (2009)"},{"doi-asserted-by":"crossref","unstructured":"Ceng, J., Castrillon, J., Sheng, W., Scharw\u00e4chter, H., Leupers, R., Ascheid, G., Meyr, H., Isshiki, T., Kunieda, H.: MAPS: an integrated framework for MPSoC application parallelization. In: DAC \u201908: Proceedings of the 45th annual conference on Design automation, pp.\u00a0754\u2013759. ACM, New York, NY, USA (2008)","key":"37_CR20","DOI":"10.1145\/1391469.1391663"},{"doi-asserted-by":"crossref","unstructured":"Ceng, J., Sheng, W., Castrillon, J., Stulova, A., Leupers, R., Ascheid, G., Meyr, H.: A high-level virtual platform for early MPSoC software development. In: CODES+ISSS \u201909: Proceedings of the 7th IEEE\/ACM international conference on Hardware\/software codesign and system synthesis, pp.\u00a011\u201320. ACM, New York, NY, USA (2009)","key":"37_CR21","DOI":"10.1145\/1629435.1629438"},{"doi-asserted-by":"crossref","unstructured":"Cesario, W., Jerraya, A.: Multiprocessor Systems-on-Chips, chap. Chapter 9. Component-Based Design for Multiprocessor Systems-on-Chip, pp.\u00a0357\u2013394. Morgan Kaufmann (2005)","key":"37_CR22","DOI":"10.1016\/B978-012385251-9\/50029-3"},{"unstructured":"Collette, T.: Key technologies for many core architectures. In: 8th International Forum on Application-Specific Multi-Processor SoC (2008)","key":"37_CR23"},{"unstructured":"CoWare: CoWare Virtual Platforms. \n                  http:\/\/www.coware.com\/products\/virtualplatform.php\n                  \n                . Visited on Apr. 2009","key":"37_CR24"},{"unstructured":"Fisher, J., P., F., Young, C.: Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools. Morgan-Kaufmann (Elsevier) (2005)","key":"37_CR25"},{"unstructured":"Flake, P., Davidmann, S., Schirrmeister, F.: System-level exploration tools for MPSoC designs. In: Design Automation Conference, 2006 43rd ACM\/IEEE, pp.\u00a0286\u2013287 (2006)","key":"37_CR26"},{"doi-asserted-by":"crossref","unstructured":"Gao, L., Huang, J., Ceng, J., Leupers, R., Ascheid, G., Meyr, H.: TotalProf: a fast and accurate retargetable source code profiler. In: CODES+ISSS \u201909: Proceedings of the 7th IEEE\/ACM international conference on Hardware\/software codesign and system synthesis, pp.\u00a0305\u2013314. ACM, New York, NY, USA (2009)","key":"37_CR27","DOI":"10.1145\/1629435.1629477"},{"doi-asserted-by":"crossref","unstructured":"Geilen, M., Basten, T.: Kahn process networks and a reactive extension. In: S.S. Bhattacharyya, E.F. Deprettere, R.\u00a0Leupers, J.\u00a0Takala (eds.) Handbook of Signal Processing Systems, second edn. Springer (2013)","key":"37_CR28","DOI":"10.1007\/978-1-4614-6859-2_32"},{"unstructured":"Gheorghita, S., T.\u00a0Basten, H.C.: An overview of application scenario usage in streaming-oriented embedded system design","key":"37_CR29"},{"doi-asserted-by":"crossref","unstructured":"Gupta, R., Micheli, G.D.: Hardware-software co-synthesis for digital systems. In: IEEE Design & Test of Computers, pp.\u00a029\u201341 (1993)","key":"37_CR30","DOI":"10.1109\/54.232470"},{"doi-asserted-by":"crossref","unstructured":"Ha, S., Oh, H.: Decidable dataflow models for signal processing: Synchronous dataflow and its extensions. In: S.S. Bhattacharyya, E.F. Deprettere, R.\u00a0Leupers, J.\u00a0Takala (eds.) Handbook of Signal Processing Systems, second edn. Springer (2013)","key":"37_CR31","DOI":"10.1007\/978-1-4614-6859-2_33"},{"doi-asserted-by":"crossref","unstructured":"Hankins, R.A., et\u00a0al.: Multiple instruction stream processor. SIGARCH Comp. Arch. News 34(2) (2006)","key":"37_CR32","DOI":"10.1145\/1150019.1136495"},{"issue":"1","key":"37_CR33","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1455229.1455231","volume":"14","author":"A. Hansson","year":"2009","unstructured":"Hansson, A., Goossens, K., Bekooij, M., Huisken, J.: CoMPSoC: A template for composable and predictable multi-processor system on chips. ACM Trans. Des. Autom. Electron. Syst. 14(1), 1\u201324 (2009)","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"doi-asserted-by":"crossref","unstructured":"Hewitt, C., Bishop, P., Greif, I., Smith, B., Matson, T., Steiger, R.: Actor induction and meta-evaluation. In: POPL \u201973: Proceedings of the 1st annual ACM SIGACT-SIGPLAN symposium on Principles of programming languages, pp.\u00a0153\u2013168. ACM, New York, NY, USA (1973)","key":"37_CR34","DOI":"10.1145\/512927.512942"},{"doi-asserted-by":"crossref","unstructured":"Hind, M.: Pointer analysis: Haven\u2019t we solved this problem yet? In: PASTE \u201901, pp.\u00a054\u201361. ACM Press (2001)","key":"37_CR35","DOI":"10.1145\/379605.379665"},{"issue":"6","key":"37_CR36","doi-asserted-by":"crossref","first-page":"841","DOI":"10.1287\/opre.9.6.841","volume":"9","author":"T.C. Hu","year":"1961","unstructured":"Hu, T.C.: Parallel sequencing and assembly line problems. Operations Research 9(6), 841\u2013848 (1961). URL \n                  http:\/\/www.jstor.org\/stable\/167050","journal-title":"Operations Research"},{"doi-asserted-by":"crossref","unstructured":"Hwang, Y., Abdi, S., Gajski, D.: Cycle-approximate retargetable performance estimation at the transaction level. In: DATE \u201908: Proceedings of the conference on Design, automation and test in Europe, pp.\u00a03\u20138. ACM, New York, NY, USA (2008)","key":"37_CR37","DOI":"10.1145\/1403375.1403380"},{"doi-asserted-by":"crossref","unstructured":"Hwu, W.M., Ryoo, S., Ueng, S.Z., Kelm, J.H., Gelado, I., Stone, S.S., Kidd, R.E., Baghsorkhi, S.S., Mahesri, A.A., Tsao, S.C., Navarro, N., Lumetta, S.S., Frank, M.I., Patel, S.J.: Implicitly parallel programming models for thousand-core microprocessors. In: DAC \u201907: Proceedings of the 44th annual conference on Design automation, pp.\u00a0754\u2013759. ACM, New York, NY, USA (2007)","key":"37_CR38","DOI":"10.1145\/1278480.1278669"},{"key":"37_CR39","first-page":"471","volume-title":"Information Processing \u201974: Proceedings of the IFIP Congress","author":"G. Kahn","year":"1974","unstructured":"Kahn, G.: The semantics of a simple language for parallel programming. In: J.L. Rosenfeld (ed.) Information Processing \u201974: Proceedings of the IFIP Congress, pp.\u00a0471\u2013475. North-Holland, New York, NY (1974)"},{"doi-asserted-by":"crossref","unstructured":"Kandemir, M., Dutt, N.: Multiprocessor Systems-on-Chips, chap. Chapter 9. Memory Systems and Compiler Support for MPSoC Architectures, pp.\u00a0251\u2013281. Morgan Kaufmann (2005)","key":"37_CR40","DOI":"10.1016\/B978-012385251-9\/50024-4"},{"doi-asserted-by":"crossref","unstructured":"Karp, R.M., Miller, R.E.: Properties of a model for parallel computations: Determinacy, termination, queuing. SIAM Journal of Applied Math 14(6) (1966)","key":"37_CR41","DOI":"10.1137\/0114108"},{"doi-asserted-by":"crossref","unstructured":"Karuri, K., Al\u00a0Faruque, M.A., Kraemer, S., Leupers, R., Ascheid, G., Meyr, H.: Fine-grained application source code profiling for ASIP design. In: DAC \u201905: Proceedings of the 42nd annual conference on Design automation, pp.\u00a0329\u2013334. ACM, New York, NY, USA (2005)","key":"37_CR42","DOI":"10.1145\/1065579.1065666"},{"doi-asserted-by":"crossref","unstructured":"Kempf, T., Wallentowitz, S., Ascheid, G., Leupers, R., Meyr, H.: A workbench for analytical and simulation based design space exploration of software defined radios. In: Proc. Int. Conf. VLSI Design, pp.\u00a0281\u2013286. New Delhi, India (2009)","key":"37_CR43","DOI":"10.1109\/VLSI.Design.2009.24"},{"key":"37_CR44","volume-title":"Optimizing compilers for modern architectures: A dependence-based approach","author":"K. Kennedy","year":"2002","unstructured":"Kennedy, K., Allen, J.R.: Optimizing compilers for modern architectures: A dependence-based approach. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA (2002)"},{"unstructured":"Kloss, N.: Application Programming Strategies for TI\u2019s OMAP Solutions. Embedded Edge (2003)","key":"37_CR45"},{"issue":"9","key":"37_CR46","doi-asserted-by":"publisher","first-page":"866","DOI":"10.1109\/12.795218","volume":"48","author":"V. Krishnan","year":"1999","unstructured":"Krishnan, V., Torrellas, J.: A chip-multiprocessor architecture with speculative multithreading. IEEE Trans. Comput. 48(9), 866\u2013880 (1999)","journal-title":"IEEE Trans. Comput."},{"doi-asserted-by":"crossref","unstructured":"Kumar, S., Hughes, C.J., Nguyen, A.: Carbon: Architectural support for fine-grained parallelism on chip multiprocessors. SIGARCH Comp. Arch. News 35(2) (2007)","key":"37_CR47","DOI":"10.1145\/1273440.1250683"},{"issue":"1","key":"37_CR48","doi-asserted-by":"publisher","first-page":"37","DOI":"10.1109\/MC.1982.1653825","volume":"15","author":"H.T. Kung","year":"1982","unstructured":"Kung, H.T.: Why systolic architectures? Computer 15(1), 37\u201346 (1982)","journal-title":"Computer"},{"issue":"4","key":"37_CR49","doi-asserted-by":"publisher","first-page":"406","DOI":"10.1145\/344588.344618","volume":"31","author":"Y.K. Kwok","year":"1999","unstructured":"Kwok, Y.K., Ahmad, I.: Static scheduling algorithms for allocating directed task graphs to multiprocessors. ACM Comput. Surv. 31(4), 406\u2013471 (1999)","journal-title":"ACM Comput. Surv."},{"issue":"3","key":"37_CR50","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1367045.1367048","volume":"13","author":"S. Kwon","year":"2008","unstructured":"Kwon, S., Kim, Y., Jeun, W.C., Ha, S., Paek, Y.: A retargetable parallel-programming framework for MPSoC. ACM Trans. Des. Autom. Electron. Syst. 13(3), 1\u201318 (2008)","journal-title":"ACM Trans. Des. Autom. Electron. Syst."},{"issue":"7","key":"37_CR51","doi-asserted-by":"publisher","first-page":"318","DOI":"10.1145\/960116.54022","volume":"23","author":"M. Lam","year":"1988","unstructured":"Lam, M.: Software pipelining: An effective scheduling technique for VLIW machines. SIGPLAN Not. 23(7), 318\u2013328 (1988)","journal-title":"SIGPLAN Not."},{"issue":"9","key":"37_CR52","doi-asserted-by":"publisher","first-page":"1235","DOI":"10.1109\/PROC.1987.13876","volume":"75","author":"E. Lee","year":"1987","unstructured":"Lee, E., Messerschmitt, D.: Synchronous data flow. Proceedings of the IEEE 75(9), 1235\u20131245 (1987)","journal-title":"Proceedings of the IEEE"},{"issue":"2","key":"37_CR53","doi-asserted-by":"publisher","first-page":"223","DOI":"10.1109\/71.89067","volume":"2","author":"E.A. Lee","year":"1991","unstructured":"Lee, E.A.: Consistency in dataflow graphs. IEEE Trans. Parallel Distrib. Syst. 2(2), 223\u2013235 (1991)","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"issue":"5","key":"37_CR54","doi-asserted-by":"crossref","first-page":"33","DOI":"10.1109\/MC.2006.180","volume":"39","author":"E.A. Lee","year":"2006","unstructured":"Lee, E.A.: The problem with threads. Computer 39(5), 33\u201342 (2006). URL \n                  http:\/\/portal.acm.org\/citation.cfm?id=1137232.1137289","journal-title":"Computer"},{"key":"37_CR55","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2570-4","volume-title":"Retargetable Code Generation for Digital Signal Processors","author":"R. Leupers","year":"1997","unstructured":"Leupers, R.: Retargetable Code Generation for Digital Signal Processors. Kluwer Academic Publishers, Norwell, MA, USA (1997)"},{"doi-asserted-by":"crossref","unstructured":"Leupers, R.: Code selection for media processors with SIMD instructions. In: DATE \u201900, pp.\u00a04\u20138. ACM (2000)","key":"37_CR56","DOI":"10.1145\/343647.343679"},{"doi-asserted-by":"crossref","unstructured":"Li, L., Huang, B., Dai, J., Harrison, L.: Automatic multithreading and multiprocessing of C programs for IXP. In: PPoPP \u201905: Proceedings of the tenth ACM SIGPLAN symposium on Principles and practice of parallel programming, pp.\u00a0132\u2013141. ACM, New York, NY, USA (2005)","key":"37_CR57","DOI":"10.1145\/1065944.1065963"},{"key":"37_CR58","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-6344-2","volume-title":"Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms","author":"Z. Ma","year":"2007","unstructured":"Ma, Z., Marchal, P., Scarpazza, D.P., Yang, P., Wong, C., Gmez, J.I., Himpe, S., Ykman-Couvreur, C., Catthoor, F.: Systematic Methodology for Real-Time Cost-Effective Mapping of Dynamic Concurrent Task-Based Systems on Heterogenous Platforms. Springer Publishing Company, Incorporated (2007)"},{"unstructured":"Martin, G.: ESL requirements for configurable processor-based embedded system design. Design and Reuse","key":"37_CR59"},{"issue":"3","key":"37_CR60","doi-asserted-by":"publisher","first-page":"31","DOI":"10.1109\/MM.2009.46","volume":"29","author":"J.Y. Mignolet","year":"2009","unstructured":"Mignolet, J.Y., Baert, R., Ashby, T.J., Avasare, P., Jang, H.O., Son, J.C.: MPA: Parallelizing an application onto a multicore platform made easy. IEEE Micro 29(3), 31\u201339 (2009)","journal-title":"IEEE Micro"},{"key":"37_CR61","volume-title":"Advanced Compiler Design and Implementation","author":"S.S. Muchnick","year":"1997","unstructured":"Muchnick, S.S.: Advanced Compiler Design and Implementation. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA (1997)"},{"unstructured":"National Instruments: LabView. \n                  http:\/\/www.ni.com\/labview\/\n                  \n                . Visited on Mar. 2009","key":"37_CR62"},{"key":"37_CR63","doi-asserted-by":"publisher","first-page":"233","DOI":"10.1023\/A:1019782306621","volume":"7","author":"A. Nieuwland","year":"2002","unstructured":"Nieuwland, A., Kang, J., Gangwal, O.P., Sethuraman, R., Busa, R.S.C.N., Goossens, K., Llopis, R.P.: C-HEAP: A heterogeneous multi-processor architecture template and scalable and flexible protocol for the design of embedded signal processing systems. Design Automation for Embedded Systems (7), 233\u2013270 (2002)","journal-title":"Design Automation for Embedded Systems"},{"issue":"3","key":"37_CR64","doi-asserted-by":"publisher","first-page":"542","DOI":"10.1109\/TCAD.2007.911337","volume":"27","author":"H. Nikolov","year":"2008","unstructured":"Nikolov, H., Stefanov, T., Deprettere, E.: Systematic and automated multiprocessor system design, programming, and implementation. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on 27(3), 542\u2013555 (2008)","journal-title":"Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on"},{"doi-asserted-by":"crossref","unstructured":"Nikolov, H., Thompson, M., Stefanov, T., Pimentel, A., Polstra, S., Bose, R., Zissulescu, C., Deprettere, E.: Daedalus: Toward composable multimedia MP-SoC design. In: DAC \u201908: Proceedings of the 45th annual conference on Design automation, pp.\u00a0574\u2013579. ACM, New York, NY, USA (2008)","key":"37_CR65","DOI":"10.1145\/1391469.1391615"},{"unstructured":"The OpenMP specification for parallel programming: \n                  www.openmp.org\n                  \n                . Visited on Nov. 2009","key":"37_CR66"},{"doi-asserted-by":"crossref","unstructured":"Palsberg, J., Naik, M.: Multiprocessor Systems-on-Chips, chap. Chapter 12. ILP-based Resource-aware Compilation, pp.\u00a0337\u2013354. Morgan Kaufmann (2005)","key":"37_CR67","DOI":"10.1016\/B978-012385251-9\/50027-X"},{"doi-asserted-by":"crossref","unstructured":"Paolucci, P.S., Jerraya, A.A., Leupers, R., Thiele, L., Vicini, P.: SHAPES:: a tiled scalable software hardware architecture platform for embedded systems. In: CODES+ISSS \u201906: Proceedings of the 4th international conference on Hardware\/software codesign and system synthesis, pp.\u00a0167\u2013172. ACM, New York, NY, USA (2006)","key":"37_CR68","DOI":"10.1145\/1176254.1176297"},{"doi-asserted-by":"crossref","unstructured":"Park, S., sun Hong, D., Chae, S.I.: A hardware operating system kernel for multi-processor systems. IEICE 5(9) (2008)","key":"37_CR69","DOI":"10.1587\/elex.5.296"},{"unstructured":"Parks, T.M.: Bounded scheduling of process networks. Ph.D. thesis, Berkeley, CA, USA (1995)","key":"37_CR70"},{"issue":"2","key":"37_CR71","doi-asserted-by":"publisher","first-page":"99","DOI":"10.1109\/TC.2006.16","volume":"55","author":"A.D. Pimentel","year":"2006","unstructured":"Pimentel, A.D., Erbas, C., Polstra, S.: A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Transactions on Computers 55(2), 99\u2013112 (2006)","journal-title":"IEEE Transactions on Computers"},{"doi-asserted-by":"crossref","unstructured":"Sharma, G., Martin, J.: MATLAB (R): A language for parallel computing. International Journal of Parallel Programming 37(1) (2009)","key":"37_CR72","DOI":"10.1007\/s10766-008-0082-5"},{"doi-asserted-by":"crossref","unstructured":"Sheng, W., Sch\u00fcrmans, S., Odendahl, M., Leupers, R., Ascheid, G.: Automatic calibration of streaming applications for software mapping exploration. In: Proceedings of the International Symposium on System-on-Chip (SoC) (2011)","key":"37_CR73","DOI":"10.1109\/ISSOC.2011.6089217"},{"key":"37_CR74","volume-title":"MPI-The","author":"M. Snir","year":"1998","unstructured":"Snir, M., Otto, S.: MPI-The Complete Reference: The MPI Core. MIT Press (1998)"},{"unstructured":"Sporer, T., Franck, A., Bacivarov, I., Beckinger, M., Haid, W., Huang, K., Thiele, L., Paolucci, P., Bazzana, P., Vicini, P., Ceng, J., Kraemer, S., Leupers, R.: SHAPES - a scalable parallel HW\/SW architecture applied to wave field synthesis. In: Proc. 32nd Intl Audio Engineering Society (AES) Conference, pp.\u00a0175\u2013187. Audio Engineering Society, Hillerod, Denmark (2007)","key":"37_CR75"},{"key":"37_CR76","volume-title":"Embedded Multiprocessors: Scheduling and Synchronization","author":"S. Sriram","year":"2000","unstructured":"Sriram, S., Bhattacharyya, S.S.: Embedded Multiprocessors: Scheduling and Synchronization. Marcel Dekker, Inc., New York, NY, USA (2000)"},{"unstructured":"Standard for information technology - portable operating system interface (POSIX). Shell and utilities. IEEE Std 1003.1\u20132004, The Open Group Base Specifications Issue 6, section 2.9: IEEE and The Open Group","key":"37_CR77"},{"unstructured":"Synopsys: Synopsys Virtual Platforms. \n                  http:\/\/www.synopsys.com\/Tools\/SLD\/VirtualPlatforms\/Pages\/default.aspx\n                  \n                . Visited on May 2009","key":"37_CR78"},{"unstructured":"TI: OMAP35x Product Bulletin. \n                  http:\/\/www.ti.com\/lit\/sprt457\n                  \n                . Visited on Mar. 2009","key":"37_CR79"},{"unstructured":"TI: TI eXpressDSP Software and Development Tools. \n                  http:\/\/focus.ti.com\/general\/docs\/gencontent.tsp?contentId=46891\n                  \n                . Visited on Jan. 2010","key":"37_CR80"},{"doi-asserted-by":"crossref","unstructured":"Tournavitis, G., Wang, Z., Franke, B., O\u2019Boyle, M.: Towards a holistic approach to auto-parallelization\u00a0\u2013 integrating profile-driven parallelism detection and machine-learning based mapping. In: PLDI 0\u20139: Proceedings of the Programming Language Design and Implementation Conference. Dublin, Ireland (2009)","key":"37_CR81","DOI":"10.1145\/1542476.1542496"},{"unstructured":"UMIC: Ultra high speed Mobile Information and Communication. \n                  http:\/\/www.umic.rwth-aachen.de\n                  \n                . Visited on Nov. 2009","key":"37_CR82"},{"issue":"1","key":"37_CR83","doi-asserted-by":"crossref","first-page":"19","DOI":"10.1186\/1687-3963-2007-075947","volume":"2007","author":"S. Verdoolaege","year":"2007","unstructured":"Verdoolaege, S., Nikolov, H., Stefanov, T.: pn: A tool for improved derivation of process networks. EURASIP J. Embedded Syst. 2007(1), 19\u201319 (2007)","journal-title":"EURASIP J. Embedded Syst."},{"issue":"3","key":"37_CR84","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/1347375.1347389","volume":"7","author":"R. Wilhelm","year":"2008","unstructured":"Wilhelm, R., Engblom, J., Ermedahl, A., Holsti, N., Thesing, S., Whalley, D., Bernat, G., Ferdinand, C., Heckmann, R., Mitra, T., Mueller, F., Puaut, I., Puschner, P., Staschulat, J., Stenstr\u00f6m, P.: The worst-case execution-time problem - overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst. 7(3), 1\u201353 (2008)","journal-title":"ACM Trans. Embed. Comput. Syst."},{"unstructured":"Working Group ISO\/IEC JTC1\/SC22\/WG14: C99, Programming Language C ISO\/IEC 9899:1999","key":"37_CR85"},{"issue":"7","key":"37_CR86","doi-asserted-by":"publisher","first-page":"1748","DOI":"10.1093\/ietfec\/e91-a.7.1748","volume":"E91-A","author":"M. Zalfany Urfianto","year":"2008","unstructured":"Zalfany\u00a0Urfianto, M., Isshiki, T., Ullah\u00a0Khan, A., Li, D., Kunieda, H.: Decomposition of task-level concurrency on C programs applied to the design of multiprocessor SoC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. E91-A(7), 1748\u20131756 (2008)","journal-title":"IEICE Trans. Fundam. Electron. Commun. Comput. Sci."}],"container-title":["Handbook of Signal Processing Systems"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-1-4614-6859-2_37","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,14]],"date-time":"2019-05-14T04:48:32Z","timestamp":1557809312000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-1-4614-6859-2_37"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013]]},"ISBN":["9781461468585","9781461468592"],"references-count":86,"URL":"https:\/\/doi.org\/10.1007\/978-1-4614-6859-2_37","relation":{},"subject":[],"published":{"date-parts":[[2013]]}}}