{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T06:07:01Z","timestamp":1725602821845},"publisher-location":"Boston, MA","reference-count":37,"publisher":"Springer US","isbn-type":[{"type":"print","value":"9780792394778"},{"type":"electronic","value":"9781461526988"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[1994]]},"DOI":"10.1007\/978-1-4615-2698-8_6","type":"book-chapter","created":{"date-parts":[[2011,8,25]],"date-time":"2011-08-25T05:15:00Z","timestamp":1314249300000},"page":"97-138","source":"Crossref","is-referenced-by-count":5,"title":["Multithreading: Fundamental Limits, Potential Gains, and Alternatives"],"prefix":"10.1007","author":[{"given":"David E.","family":"Culler","sequence":"first","affiliation":[]}],"member":"297","reference":[{"key":"6_CR1","doi-asserted-by":"publisher","first-page":"2","DOI":"10.1109\/ISCA.1990.134502","volume-title":"Proc. of the 17th Annual Intl Symp. on Computer Architecture","author":"SV Adve","year":"1990","unstructured":"S. V. Adve and M. D. Hill. Weak Ordering - A New Definition. In Proc. of the 17th Annual Intl Symp. on Computer Architecture,pages 2\u201314, Seattle, WA, May 1990."},{"key":"6_CR2","volume-title":"The Tera Computer System","author":"R Alverson","year":"1990","unstructured":"R. Alverson, D. Callahan, D. Cummings, Koblenz B., A. Porterfield, and B. Smith. The Tera Computer System. In Proc. of 1990 Intl Conf. on Supercomputing, June 1990."},{"issue":"4","key":"6_CR3","doi-asserted-by":"crossref","first-page":"398","DOI":"10.1109\/71.97897","volume":"2","author":"A. Argarwal","year":"1991","unstructured":"A. Argarwal. Limits on Interconnection Network Performance. IEEE Transactions on Parallel and Distributed Systems, 2(4):398\u2013411, October 1991.","journal-title":"IEEE Transactions on Parallel and Distributed Systems"},{"key":"6_CR4","first-page":"1986","volume-title":"Annual Reviews in Computer Science, volume 1, pages 225-253. Annual Reviews Inc., Palo Alto, CA","author":"Arvind and D. E. Culler. Dataflow Architectures","year":"1987","unstructured":"Arvind and D. E. Culler. Dataflow Architectures. In Annual Reviews in Computer Science, volume 1, pages 225\u2013253. Annual Reviews Inc., Palo Alto, CA, 1986. Reprinted in Dataflow and Reduction Architectures, S. S. Thakkar, editor, IEEE Computer Society Press, 1987."},{"issue":"5","key":"6_CR5","doi-asserted-by":"publisher","first-page":"460","DOI":"10.1016\/0743-7315(88)90009-3","volume":"5","author":"Arvind and K. Ekanadham","year":"1988","unstructured":"Arvind and K. Ekanadham. Future Scientific Programming on Parallel Machines. Journal of Parallel and Distributed Computing, 5(5):460\u2013493, October 1988.","journal-title":"Journal of Parallel and Distributed Computing"},{"key":"6_CR6","volume-title":"Two Fundamental Issues in Multiprocessing","author":"Arvind and R. A. Iannucci","year":"1987","unstructured":"Arvind and R. A. Iannucci. Two Fundamental Issues in Multiprocessing. In Proc. of DFVLR - Conf. 1987 on Par. Proc. in Science and Eng., Bonn-Bad Godesberg, W. Germany, June 1987."},{"key":"6_CR7","volume-title":"Fine-grain Parallelism with Minimal Hardware Support: A Compiler-Controlled Threaded Abstract Machine","author":"D Culler","year":"1991","unstructured":"D. Culler, A. Sah, K. Schauser, T. von Eicken, and J. Wawrzynek. Fine-grain Parallelism with Minimal Hardware Support: A Compiler-Controlled Threaded Abstract Machine. In Proc. of 4th Int. Conf. on Architectural Support for Programming Languages and Operating Systems, Santa-Clara, CA, April 1991."},{"key":"6_CR8","volume-title":"Managing Parallelism and Resources in Scientific Dataflow Programs. Technical Report","author":"DE Culler","year":"1990","unstructured":"D. E. Culler. Managing Parallelism and Resources in Scientific Dataflow Programs. Technical Report 446, MIT Lab for Comp. Sci., March 1990."},{"key":"6_CR9","first-page":"141","volume-title":"Proc. of the 15th Annual Int. Symp. on Comp. Arch.","author":"DE Culler","year":"1988","unstructured":"D. E. Culler and Arvind. Resource Requirements of Dataflow Programs. In Proc. of the 15th Annual Int. Symp. on Comp. Arch., pages 141\u2013150, Hawaii, May 1988."},{"key":"6_CR10","volume-title":"Analysis of Multithreaded Microprocessors under Multiprogramming. Technical Report UCB\/CSD92\/687, Univ. of California","author":"DE Culler","year":"1992","unstructured":"D. E. Culler, M. Gunter, and J. C. Lee. Analysis of Multithreaded Microprocessors under Multiprogramming. Technical Report UCB\/CSD 92\/687, Univ. of California, Berkeley, Computer Science Division, May 1992."},{"key":"6_CR11","first-page":"189","volume-title":"Architecture of a Message-Driven Processor","author":"W Dally","year":"1987","unstructured":"W. Dally and et al. Architecture of a Message-Driven Processor. In Proc. of the 14th Annual Int. Symp. on Comp. Arch., pages 189\u2013196, June 1987."},{"key":"6_CR12","doi-asserted-by":"crossref","DOI":"10.21236\/ADA211909","volume-title":"The J-Machine: A Fine-Grain Concurrent Computer","author":"W Dally","year":"1989","unstructured":"W. Dally and et al. The J-Machine: A Fine-Grain Concurrent Computer. In IFIP Congress, 1989."},{"key":"6_CR13","first-page":"65","volume-title":"Proc. of the ACM Conf. on Functional Programming Languages and Computer Architecture","author":"J Darlington","year":"1981","unstructured":"J. Darlington and M. Reeve. ALICE - a multiprocessor reduction machine for parallel evaluation of applicative languages. In Proc. of the ACM Conf. on Functional Programming Languages and Computer Architecture,pages 65\u201375, New Hampshire, October 1981."},{"issue":"11","key":"6_CR14","doi-asserted-by":"publisher","first-page":"48","DOI":"10.1109\/MC.1980.1653418","volume":"13","author":"JB Dennis","year":"1980","unstructured":"J. B. Dennis. Data Flow Supercomputers. IEEE Computer, 13(11):48\u201356, November 1980.","journal-title":"IEEE Computer"},{"key":"6_CR15","first-page":"88","volume-title":"The Epsilon-2 Hybrid Dataflow Architecture","author":"VG Grafe","year":"1990","unstructured":"V. G. Grafe and J. E. Hoch. The Epsilon-2 Hybrid Dataflow Architecture. In Proc. of Compcon90, pages 88\u201393, March 1990."},{"key":"6_CR16","first-page":"254","volume-title":"Proc.of the 18th Annual Intl Symp. on Computer Architecture","author":"A Gupta","year":"1991","unstructured":"A. Gupta, J. Hennessy, K. Gharachorloo, and W.-D. Weber. Comparative Evalutation of Latency Reducing and Tolerating Techniques. In Proc.\n                  of the 18th Annual Intl Symp. on Computer Architecture, pages 254\u201365, Jerusalem, Israel, May 1991."},{"issue":"1","key":"6_CR17","doi-asserted-by":"publisher","first-page":"34","DOI":"10.1145\/2465.2468","volume":"28","author":"J Gurd","year":"1985","unstructured":"J. Gurd, C.C. Kirkham, and I. Watson. The Manchester Prototype Dataflow Computer. Communications of the Association for Computing Machinery, 28(1):34\u201352, January 1985.","journal-title":"Communications of the Association for Computing Machinery"},{"issue":"4","key":"6_CR18","doi-asserted-by":"publisher","first-page":"501","DOI":"10.1145\/4472.4478","volume":"7","author":"RH Halstead","year":"1985","unstructured":"R. H. Halstead, Jr. Multilisp: A Language for Concurrent Symbolic Computation. ACM Transactions on Programming Languages and Systems, 7(4):501\u2013538, October 1985.","journal-title":"ACM Transactions on Programming Languages and Systems"},{"key":"6_CR19","first-page":"443","volume-title":"MASA: a Multithreaded Processor Architecture for Parallel Symbolic Computing","author":"RH Halstead","year":"1988","unstructured":"R. H. Halstead and T. Fujita. MASA: a Multithreaded Processor Architecture for Parallel Symbolic Computing. In Proc. of the 15th Int. Symp. on Comp. Arch., pages 443\u2013451, 1988."},{"key":"6_CR20","first-page":"584","volume-title":"Maintainence Architecture and its LSI Implementation of a Dataflow Computer with a Large Number of Processors.","author":"K Hiraki","year":"1986","unstructured":"K. Hiraki, K. Nishida, S. Sekiguchi, and T. Shimada. Maintainence Architecture and its LSI Implementation of a Dataflow Computer with a Large Number of Processors. In Proc. of the 1986 Int. Conf. on Par. Proc., pages 584\u2013591, 1986."},{"key":"6_CR21","doi-asserted-by":"crossref","DOI":"10.21236\/ADA211882","volume-title":"Experience with CST: Programming and Implementation","author":"W Horwat","year":"1989","unstructured":"W. Horwat, A. A. Chien, and W. J. Dally. Experience with CST: Programming and Implementation. In Proc. of the ACM SIGPLAN \u201889 Conference on Programming Language Design and Implementation, 1989."},{"key":"6_CR22","first-page":"131","volume-title":"Proc. 15th Int. Symp. on Comp. Arch.","author":"RA Iannucci","year":"1988","unstructured":"R. A. Iannucci. Toward a Dataflow\/von Neumann Hybrid Architecture. In Proc. 15th Int. Symp. on Comp. Arch., pages 131\u2013140, Hawaii, May 1988."},{"key":"6_CR23","volume-title":"Performance Measurement on HEP \u00a1\u00aa A Pipelined MIMD Computer","author":"HF Jordan","year":"1983","unstructured":"H. F. Jordan. Performance Measurement on HEP \u00a1\u00aa A Pipelined MIMD Computer. In Proc. of the 10th Annual Int. Symp. on Comp. Arch., Stockholm, Sweden, June 1983."},{"key":"6_CR24","volume-title":"ID Language Reference Manual Version 90.1.","author":"RS Nikhil","year":"1991","unstructured":"R. S. Nikhil. ID Language Reference Manual Version 90.1. Technical Report CSG Memo 284\u20132, MIT Lab for Comp. Sci., 545 Tech. Square, Cambridge, MA, 1991."},{"key":"6_CR25","unstructured":"R. S. Nikhil. The Parallel Programming Language Id and its Compilation for Parallel Machines. In Proc. Workshop on Massive Parallelism, Amalfi, Italy, October 1989. Academic Press, 1991. Also: CSG Memo 313, MIT Laboratory for Computer Science, 545 Technology Square, Cambridge, MA 02139, USA."},{"key":"6_CR26","volume-title":"Can Dataflow Subsume von Neumann Computing","author":"RS Nikhil","year":"1989","unstructured":"R. S. Nikhil and Arvind. Can Dataflow Subsume von Neumann Computing? In Proc. of the 16th Annual Int. Symp. on Comp. Arch.,Jerusalem, Israel, May 1989."},{"key":"6_CR27","doi-asserted-by":"publisher","first-page":"156","DOI":"10.1109\/ISCA.1992.753313","volume-title":"Proc. of the 19th Annual Intl Symp. on Computer Architecture","author":"RS Nikhil","year":"1992","unstructured":"R. S. Nikhil, G. M. Papadopoulos, and Arvind. *T: A Multithreaded Massively Parallel Architecture. In Proc. of the 19th Annual Intl Symp. on Computer Architecture, pages 156\u201367, Gold Coast, AUS, May 1992."},{"key":"6_CR28","volume-title":"Monsoon: an Explicit Token-Store Architecture","author":"GM Papadopoulos","year":"1990","unstructured":"G. M. Papadopoulos and D. E. Culler. Monsoon: an Explicit Token-Store Architecture. In Proc. of the 17th Annual Int. Symp. on Comp. Arch.,Seattle, Washington, May 1990."},{"key":"6_CR29","first-page":"98","volume-title":"GRIP - a high performance architecture for parallel graph reduction","author":"SL Peyton Jones","year":"1987","unstructured":"S. L. Peyton Jones, C. Clack, J. Salkild, and M. Hardie. GRIP - a high performance architecture for parallel graph reduction. In Proc. of the ACM Conf. on Functional Programming and Computer Architecture, pages 98\u2013112, 1987."},{"key":"6_CR30","volume-title":"An Analytical Solution for a Markov Chain Modeling Multithreaded Execution. Technical Report UCB\/XSD 91\/623, Univ. of California","author":"R Saavedra-Barrerra","year":"1991","unstructured":"R. Saavedra-Barrerra and D. E Culler. An Analytical Solution for a Markov Chain Modeling Multithreaded Execution. Technical Report UCB\/XSD 91\/623, Univ. of California, Berkeley, Computer Science Division, April 1991."},{"key":"6_CR31","volume-title":"Analysis of Multithreaded Architectures for Parallel Computing","author":"R Saavedra-Barrerra","year":"1990","unstructured":"R. Saavedra-Barrerra, D. E. Culler, and T. von Eicken. Analysis of Multithreaded Architectures for Parallel Computing. In Proceedings of the 2nd Annual Symp. on Par. Algorithms and Arch., July 1990."},{"key":"6_CR32","doi-asserted-by":"publisher","first-page":"46","DOI":"10.1109\/ISCA.1989.714523","volume-title":"Proc. of the 16th Annual Int. Symp. on Comp. Arch.","author":"S Sakai","year":"1989","unstructured":"S. Sakai, Y. Yamaguchi, K. Hiraki, Y. Kodama, and T. Yuba. An Architecture of a Dataflow Single Chip Processor. In Proc. of the 16th Annual Int. Symp. on Comp. Arch., pages 46\u201353, Jerusalem, Israel, June 1989."},{"key":"6_CR33","volume-title":"Compiler-controlled Multithreading for Lenient Parallel Languages","author":"K Schauser","year":"1991","unstructured":"K. Schauser, D.Culler, and T. von Eicken. Compiler-controlled Multithreading for Lenient Parallel Languages. In Proceedings of the 1991 Conference on Functional Programming Languages and Computer Architecture, Cambridge, MA, August 1991."},{"key":"6_CR34","volume-title":"on Comp","author":"B Smith","year":"1990","unstructured":"B. Smith. Keynote address, 17th Annual Int. Symp. on Comp. Arch., June 1990."},{"key":"6_CR35","doi-asserted-by":"publisher","first-page":"35","DOI":"10.1109\/SUPERC.1988.44632","volume-title":"Proc. of Supercomputing \u201888","author":"MR Thistle","year":"1988","unstructured":"M. R. Thistle and B. J. Smith. A Processor Architecture for Horizon. In Proc. of Supercomputing \u201888,pages 35\u201341, Orlando, FL, 1988."},{"key":"6_CR36","volume-title":"Global Analysis for Partitioning Non-Strict Programs into Sequential Threads.","author":"KR Traub","year":"1992","unstructured":"K. R. Traub, D. E. Culler, and K. E. Schauser. Global Analysis for Partitioning Non-Strict Programs into Sequential Threads. In Proc. of the ACM Conf. on LISP and Functional Programming,San Francisco, CA, June 1992."},{"key":"6_CR37","first-page":"273","volume-title":"Exploring the Benefits of Multiple Hardware Contexts in a Multiprocessor Architecture: Preliminary Results","author":"W Weber","year":"1989","unstructured":"W. Weber and A. Gupta. Exploring the Benefits of Multiple Hardware Contexts in a Multiprocessor Architecture: Preliminary Results. In Proc. of the 16th Int. Symp. on Comp. Arch., pages 273\u2013280, Jerusalem, Israel, May 1989."}],"container-title":["The Kluwer International Series in Engineering and Computer Science","Multithreaded Computer Architecture"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-1-4615-2698-8_6.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,5,1]],"date-time":"2021-05-01T10:15:50Z","timestamp":1619864150000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-1-4615-2698-8_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1994]]},"ISBN":["9780792394778","9781461526988"],"references-count":37,"URL":"https:\/\/doi.org\/10.1007\/978-1-4615-2698-8_6","relation":{},"ISSN":["0893-3405"],"issn-type":[{"type":"print","value":"0893-3405"}],"subject":[],"published":{"date-parts":[[1994]]}}}