{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T04:38:17Z","timestamp":1747802297542,"version":"3.41.0"},"publisher-location":"New York, NY","reference-count":21,"publisher":"Springer New York","isbn-type":[{"type":"print","value":"9781493920914"},{"type":"electronic","value":"9781493920921"}],"license":[{"start":{"date-parts":[[2015,1,1]],"date-time":"2015-01-01T00:00:00Z","timestamp":1420070400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2015,1,1]],"date-time":"2015-01-01T00:00:00Z","timestamp":1420070400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015]]},"DOI":"10.1007\/978-1-4939-2092-1_8","type":"book-chapter","created":{"date-parts":[[2015,3,16]],"date-time":"2015-03-16T09:30:47Z","timestamp":1426498247000},"page":"263-286","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Power and Thermal Efficient Numerical Processing"],"prefix":"10.1007","author":[{"given":"Wei","family":"Liu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alberto","family":"Nannarelli","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2015,3,17]]},"reference":[{"key":"8_CR1","doi-asserted-by":"crossref","unstructured":"S. Borkar, \u201cElectronics beyond nano-scale CMOS,\u201d Proc. of the 43rd ACM\/IEEE Design Automation Conference, pp.\u00a0807\u2013808, 2006.","DOI":"10.1145\/1146909.1147115"},{"issue":"1","key":"8_CR2","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1063\/1.1567461","volume":"94","author":"D. K. Schroder","year":"2003","unstructured":"D. K. Schroder and J. A. Babcock, \u201cNegative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing,\u201d Journal of Applied Physics, vol.\u00a094, no.\u00a01, pp.\u00a01\u201318, July 2003.","journal-title":"Journal of Applied Physics"},{"key":"8_CR3","doi-asserted-by":"crossref","unstructured":"X. Fan, W.-D. Weber, and L. A. Barroso, \u201cPower Provisioning for a Warehouse-sized Computer,\u201d Proc. of ACM International Symposium on Computer Architecture, June 2007.","DOI":"10.1145\/1250662.1250665"},{"key":"8_CR4","doi-asserted-by":"crossref","unstructured":"M. Cornea, \u201cPrecision, Accuracy, and Rounding Error Propagation in Exascale Computing,\u201d Proc. of 21st IEEE Symposium on Computer Arithmetic, pp.\u00a0231\u2013234, Apr. 2013.","DOI":"10.1109\/ARITH.2013.42"},{"key":"8_CR5","unstructured":"IEEE Standard for Floating-Point Arithmetic, IEEE Computer Society Std. 754, 2008."},{"key":"8_CR6","doi-asserted-by":"crossref","unstructured":"M. D. Ercegovac and T. Lang, Digital Arithmetic. Morgan Kaufmann Publishers, 2004.","DOI":"10.1016\/B978-155860798-9\/50011-7"},{"issue":"2","key":"8_CR7","doi-asserted-by":"publisher","first-page":"37","DOI":"10.1109\/40.755466","volume":"19","author":"S. Oberman","year":"1999","unstructured":"S. Oberman, G. Favor, and F. Weber, \u201cAMD 3DNow! technology: architecture and implementations,\u201d IEEE Micro, vol.\u00a019, no.\u00a02, pp.\u00a037\u201348, Mar.\/Apr. 1999.","journal-title":"IEEE Micro"},{"issue":"8","key":"8_CR8","doi-asserted-by":"publisher","first-page":"988","DOI":"10.1109\/TC.2004.44","volume":"53","author":"T. Lang","year":"2004","unstructured":"T. Lang and J. Bruguera, \u201cFloating-point multiply-add-fused with reduced latency,\u201d IEEE Transactions on Computers, vol.\u00a053, no.\u00a08, pp.\u00a0988\u20131003, Aug. 2004.","journal-title":"IEEE Transactions on Computers"},{"key":"8_CR9","unstructured":"M. D. Ercegovac and T. Lang, Division and Square Root: Digit Recurrence Algorithms and Implementations. Kluwer Academic Publisher, 1994."},{"key":"8_CR10","unstructured":"H. Baliga, N. Cooray, E. Gamsaragan, P. Smith, K. Yoon, J. Abel, and A. Valles, \u201cImprovements in the Intel Core2 Penryn Processor Family Architecture and Microarchitecture,\u201d Intel Technology Journal, pp.\u00a0179\u2013192, Oct. 2008."},{"key":"8_CR11","first-page":"1646","volume":"2","author":"N. Burgess","year":"2001","unstructured":"N. Burgess and C.\u00a0Hinds, \u201cDesign issues in radix-4 SRT square root and divide unit,\u201d Conference Record of 35th Asilomar Conference on Signals, Systems and Computers, vol.\u00a02, pp.\u00a01646\u20131650, 2001.","journal-title":"Conference Record of 35th Asilomar Conference on Signals, Systems and Computers"},{"key":"8_CR12","doi-asserted-by":"crossref","unstructured":"G. Gerwig, H. Wetter, E. Schwarz, and J. Haess, \u201cHigh performance floating-point unit with 116 bit wide divider,\u201d Proc. of 16th IEEE Symposium on Computer Arithmetic, pp.\u00a087\u201394, Jun. 2003.","DOI":"10.1109\/ARITH.2003.1207664"},{"key":"8_CR13","doi-asserted-by":"crossref","unstructured":"A. Nannarelli and T. Lang, \u201cLow-power division: comparison among implementations of radix 4, 8 and 16,\u201d Proc. of 14th IEEE Symposium on Computer Arithmetic, pp.\u00a060\u201367, 1999.","DOI":"10.1109\/ARITH.1999.762829"},{"key":"8_CR14","doi-asserted-by":"crossref","unstructured":"S. Oberman, \u201cFloating point division and square root algorithms and implementation in the AMD-K7 microprocessor,\u201d Proc. of 14th IEEE Symposium on Computer Arithmetic, pp.\u00a0106\u2013115, 1999.","DOI":"10.1109\/ARITH.1999.762835"},{"key":"8_CR15","unstructured":"NVIDIA. \u201cFermi. NVIDIA\u2019s Next Generation CUDA Compute Architecture\u201d. Whitepaper. [Online]. Available: http:\/\/www.nvidia.com\/content\/PDF\/fermi_white_papers\/ NVIDIA_Fermi_Compute_Architecture_Whitepaper.pdf"},{"issue":"8","key":"8_CR16","doi-asserted-by":"publisher","first-page":"932","DOI":"10.1109\/12.295855","volume":"43","author":"D. DasSarma","year":"1994","unstructured":"D. DasSarma and D. Matula, \u201cMeasuring the accuracy of ROM reciprocal tables,\u201d IEEE Transactions on Computers, vol.\u00a043, no.\u00a08, pp.\u00a0932\u2013940, Aug. 1994.","journal-title":"IEEE Transactions on Computers"},{"key":"8_CR17","unstructured":"D. A. Patterson and J. L. Hennessy, Computer Organization and Design-the hardware\/software interface, 4th\u00a0ed.Morgan Kaufmann Publishers Inc., 2009."},{"issue":"2","key":"8_CR18","doi-asserted-by":"publisher","first-page":"154","DOI":"10.1109\/12.565590","volume":"46","author":"S. Oberman","year":"1997","unstructured":"S. Oberman and M. Flynn, \u201cDesign issues in division and other floating-point operations,\u201d IEEE Transactions on Computers, vol.\u00a046, no.\u00a02, pp.\u00a0154\u2013161, Feb. 1997.","journal-title":"IEEE Transactions on Computers"},{"key":"8_CR19","doi-asserted-by":"crossref","unstructured":"W. Liu, A. Calimera, A. Nannarelli, E. Macii, and M. Poncino, \u201cOn-chip Thermal Modeling Based on SPICE Simulation,\u201d Proc. of 19th International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS 2009), pp.\u00a066\u201375, Sept. 2009.","DOI":"10.1007\/978-3-642-11802-9_11"},{"key":"8_CR20","doi-asserted-by":"publisher","first-page":"1074","DOI":"10.1109\/ASPDAC.2005.1466526","volume":"2","author":"T. Sato","year":"2005","unstructured":"T. Sato, J. Ichimiya, N. Ono, K. Hachiya, and M. Hashimoto, \u201cOn-chip thermal gradient analysis and temperature flattening for SoC design,\u201d Proc. of the 2005 Asia and South Pacific Design Automation Conference (ASP-DAC), vol.\u00a02, pp.\u00a01074\u20131077, Jan. 2005.","journal-title":"Proc. of the 2005 Asia and South Pacific Design Automation Conference (ASP-DAC)"},{"key":"8_CR21","doi-asserted-by":"crossref","unstructured":"A. Nannarelli, \u201cFPGA Based Acceleration of Decimal Operations,\u201d in Proc. of International Conference on ReConFigurable Computing and FPGA\u2019s, Dec. 2011, pp.\u00a0146\u2013151.","DOI":"10.1109\/ReConFig.2011.39"}],"container-title":["Handbook on Data Centers"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-1-4939-2092-1_8","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,21]],"date-time":"2025-05-21T00:24:34Z","timestamp":1747787074000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-1-4939-2092-1_8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015]]},"ISBN":["9781493920914","9781493920921"],"references-count":21,"URL":"https:\/\/doi.org\/10.1007\/978-1-4939-2092-1_8","relation":{},"subject":[],"published":{"date-parts":[[2015]]},"assertion":[{"value":"17 March 2015","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}