{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,28]],"date-time":"2025-03-28T00:52:38Z","timestamp":1743123158450,"version":"3.40.3"},"publisher-location":"Cham","reference-count":18,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783030186555"},{"type":"electronic","value":"9783030186562"}],"license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019]]},"DOI":"10.1007\/978-3-030-18656-2_17","type":"book-chapter","created":{"date-parts":[[2019,5,14]],"date-time":"2019-05-14T02:20:47Z","timestamp":1557800447000},"page":"224-235","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Receive-Side Notification for Enhanced RDMA in FPGA Based Networks"],"prefix":"10.1007","author":[{"given":"Joshua","family":"Lant","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andrew","family":"Attwood","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Javier","family":"Navaridas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mikel","family":"Lujan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"John","family":"Goodacre","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2019,4,25]]},"reference":[{"key":"17_CR1","doi-asserted-by":"crossref","unstructured":"Caulfield, A.M., et al.: A cloud-scale acceleration architecture. In: The 49th Annual IEEE\/ACM International Symposium on Microarchitecture, p. 7. IEEE Press (2016)","DOI":"10.1109\/MICRO.2016.7783710"},{"key":"17_CR2","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"99","DOI":"10.1007\/978-3-319-77610-1_8","volume-title":"Architecture of Computing Systems \u2013 ARCS 2018","author":"C Concatto","year":"2018","unstructured":"Concatto, C., et al.: A CAM-free exascalable HPC router for\u00a0low-energy communications. In: Berekovic, M., Buchty, R., Hamann, H., Koch, D., Pionteck, T. (eds.) ARCS 2018. LNCS, vol. 10793, pp. 99\u2013111. Springer, Cham (2018). https:\/\/doi.org\/10.1007\/978-3-319-77610-1_8"},{"issue":"4","key":"17_CR3","doi-asserted-by":"publisher","first-page":"466","DOI":"10.1109\/71.219761","volume":"4","author":"WJ Dally","year":"1993","unstructured":"Dally, W.J., Aoki, H.: Deadlock-free adaptive routing in multicomputer networks using virtual channels. IEEE Trans. Parallel Distrib. Syst. 4(4), 466\u2013475 (1993)","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"issue":"2","key":"17_CR4","doi-asserted-by":"publisher","first-page":"69","DOI":"10.1109\/MC.2008.65","volume":"41","author":"T El-Ghazawi","year":"2008","unstructured":"El-Ghazawi, T., El-Araby, E., Huang, M., Gaj, K., Kindratenko, V., Buell, D.: The promise of high-performance reconfigurable computing. Computer 41(2), 69\u201376 (2008)","journal-title":"Computer"},{"key":"17_CR5","doi-asserted-by":"publisher","first-page":"15","DOI":"10.1016\/j.parco.2015.03.009","volume":"48","author":"RE Grant","year":"2015","unstructured":"Grant, R.E., Rashti, M.J., Balaji, P., Afsahi, A.: Scalable connectionless RDMA over unreliable datagrams. Parallel Comput. 48, 15\u201339 (2015)","journal-title":"Parallel Comput."},{"key":"17_CR6","doi-asserted-by":"publisher","first-page":"58","DOI":"10.1016\/j.micpro.2018.05.009","volume":"61","author":"M Katevenis","year":"2018","unstructured":"Katevenis, M., et al.: Next generation of exascale-class systems: exanest project and the status of its interconnect and storage development. Microprocess. Microsyst. 61, 58\u201371 (2018)","journal-title":"Microprocess. Microsyst."},{"key":"17_CR7","doi-asserted-by":"crossref","unstructured":"Katevenis, M., et al.: The exanest project: interconnects, storage, and packaging for exascale systems. In: 2016 Euromicro Conference on Digital System Design (DSD), pp. 60\u201367. IEEE (2016)","DOI":"10.1109\/DSD.2016.106"},{"key":"17_CR8","doi-asserted-by":"crossref","unstructured":"Koop, M.J., Sur, S., Gao, Q., Panda, D.K.: High performance MPI design using unreliable datagram for ultra-scale infiniband clusters. In: Proceedings of the 21st Annual International Conference on Supercomputing, pp. 180\u2013189. ACM (2007)","DOI":"10.1145\/1274971.1274997"},{"key":"17_CR9","doi-asserted-by":"crossref","unstructured":"Lant, J., et al.: Enabling shared memory communication in networks of mpsocs. Concurr. Comput. Pract. Exp. (CCPE), e4774 (2018)","DOI":"10.1002\/cpe.4774"},{"key":"17_CR10","unstructured":"Mogul, J.C.: TCP offload is a dumb idea whose time has come. In: HotOS, pp. 25\u201330 (2003)"},{"issue":"11","key":"17_CR11","first-page":"1","volume":"2","author":"K Ovtcharov","year":"2015","unstructured":"Ovtcharov, K., Ruwase, O., Kim, J.Y., Fowers, J., Strauss, K., Chung, E.S.: Accelerating deep convolutional neural networks using specialized hardware. Microsoft Res. Whitepaper 2(11), 1\u20134 (2015)","journal-title":"Microsoft Res. Whitepaper"},{"key":"17_CR12","unstructured":"PLDA: An implementation of the TCP\/IP protocol suite for the Linux operating system (2018). https:\/\/github.com\/torvalds\/linux\/blob\/master\/net\/ipv4\/tcp.c"},{"key":"17_CR13","unstructured":"Intilop Corporation: 10 g bit TCP offload engine + PCIe\/DMA soc IP (2012)"},{"key":"17_CR14","unstructured":"Ohio Supercomputing Centre: Software implementation and testing of iWarp protocol (2018). https:\/\/www.osc.edu\/research\/network_file\/projects\/iwarp"},{"key":"17_CR15","doi-asserted-by":"crossref","unstructured":"Sidler, D., Alonso, G., Blott, M., Karras, K., Vissers, K., Carley, R.: Scalable 10Gbps TCP\/IP stack architecture for reconfigurable hardware. In: 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 36\u201343. IEEE (2015)","DOI":"10.1109\/FCCM.2015.12"},{"issue":"4","key":"17_CR16","first-page":"26","volume":"2","author":"KD Underwood","year":"2009","unstructured":"Underwood, K.D., Hemmert, K.S., Ulmer, C.D.: From silicon to science: the long road to production reconfigurable supercomputing. ACM Trans. Reconfigurable Technol. Syst. (TRETS) 2(4), 26 (2009)","journal-title":"ACM Trans. Reconfigurable Technol. Syst. (TRETS)"},{"key":"17_CR17","unstructured":"Xilinx Inc.: Zynq UltraScale + MPSoC Data Sheet: Overview (2018). v1.7"},{"key":"17_CR18","unstructured":"Xirouchakis, P., et al.: The network interface of the exanest hpc prototype. Technical report, ICS-FORTH \/ TR 471, Heraklion, Crete, Greece (2018)"}],"container-title":["Lecture Notes in Computer Science","Architecture of Computing Systems \u2013 ARCS 2019"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-030-18656-2_17","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,9,17]],"date-time":"2022-09-17T23:43:53Z","timestamp":1663458233000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-030-18656-2_17"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"ISBN":["9783030186555","9783030186562"],"references-count":18,"URL":"https:\/\/doi.org\/10.1007\/978-3-030-18656-2_17","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2019]]},"assertion":[{"value":"25 April 2019","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ARCS","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Architecture of Computing Systems","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Copenhagen","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Denmark","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2019","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"20 May 2019","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"23 May 2019","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"32","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"arcs2019","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/arcs2019.itec.kit.edu\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Single-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"EasyChair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"40","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"24","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"0","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"60% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"3.75","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"2.6","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}},{"value":"Yes","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information"}}]}}