{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:00:18Z","timestamp":1740099618677,"version":"3.37.3"},"publisher-location":"Cham","reference-count":27,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783030349882"},{"type":"electronic","value":"9783030349899"}],"license":[{"start":{"date-parts":[[2019,1,1]],"date-time":"2019-01-01T00:00:00Z","timestamp":1546300800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019]]},"DOI":"10.1007\/978-3-030-34989-9_12","type":"book-chapter","created":{"date-parts":[[2019,11,19]],"date-time":"2019-11-19T19:03:51Z","timestamp":1574190231000},"page":"151-163","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Modern Code Applied in Stencil in Edge Detection of an Image for Architecture Intel Xeon Phi KNL"],"prefix":"10.1007","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-8330-4779","authenticated-orcid":false,"given":"Mario","family":"Hern\u00e1ndez-Hern\u00e1ndez","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0231-2019","authenticated-orcid":false,"given":"Jos\u00e9 Luis","family":"Hern\u00e1ndez-Hern\u00e1ndez","sequence":"additional","affiliation":[]},{"given":"Edilia Rodr\u00edguez","family":"Maldonado","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8031-797X","authenticated-orcid":false,"given":"Israel Herrera","family":"Miranda","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2019,11,20]]},"reference":[{"key":"12_CR1","doi-asserted-by":"publisher","first-page":"377","DOI":"10.1016\/B978-0-12-802118-7.00023-6","volume-title":"High Performance Parallelism Pearls","author":"Cedric Andreolli","year":"2015","unstructured":"Andreolli, C., Thierry, P., Borges, L., Skinner, G., Yount, C.: Characterization and optimization methodology applied to stencil computations. In: Reinders, J., Jeffers, J. (eds.) High Performance Parallelism Pearls: Multicore and Many-Core Programming Approaches, vol. 1, pp. 377\u2013396. Morgan Kaufmann, Boston, MA, USA (2015). \n                    https:\/\/doi.org\/10.1016\/B978-0-12-802118-7.00023-6\n                    \n                  . \n                    http:\/\/www.sciencedirect.com\/science\/article\/pii\/B9780128021187000236"},{"issue":"10","key":"12_CR2","doi-asserted-by":"publisher","first-page":"2557","DOI":"10.1016\/j.camwa.2017.07.032","volume":"74","author":"JM Cebri\u00e1n","year":"2017","unstructured":"Cebri\u00e1n, J.M., Cecilia, J.M., Hern\u00e1ndez, M., Garc\u00eda, J.M.: Code modernization strategies to 3-D stencil-based applications on Intel Xeon Phi: KNC and KNL. Comput. Math. Appl. 74(10), 2557\u20132571 (2017)","journal-title":"Comput. Math. Appl."},{"key":"12_CR3","volume-title":"Parallel Programming in OpenMP","author":"R Chandra","year":"2001","unstructured":"Chandra, R.: Parallel Programming in OpenMP. Morgan Kaufmann, Burlington (2001)"},{"key":"12_CR4","unstructured":"Cramer, T., Schmidl, D., Klemm, M., an Mey, D.: OpenMP programming on Intel \u00ae\u00a0Xeon Phi \n                    \n                      \n                    \n                    $${\\text{TM}}$$\n                   coprocessors: an early performance comparison. In: Proceedings Many Core Applications Research Community (MARC) Symposium, pp. 38\u201344 (2012)"},{"issue":"1","key":"12_CR5","doi-asserted-by":"publisher","first-page":"129","DOI":"10.1137\/070693199","volume":"51","author":"K Datta","year":"2009","unstructured":"Datta, K., Kamil, S., Williams, S., Oliker, L., Shalf, J., Yelick, K.: Optimization and performance modeling of stencil computations on modern microprocessors. SIAM Rev. 51(1), 129\u2013159 (2009). \n                    https:\/\/doi.org\/10.1137\/070693199\n                    \n                  . \n                    http:\/\/epubs.siam.org\/doi\/abs\/10.1137\/070693199","journal-title":"SIAM Rev."},{"key":"12_CR6","unstructured":"Datta, K., et al.: Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures. In: Proceedings of the ACM\/IEEE Conference on Supercomputing, SC 2008, p. 4 (2008). \n                    http:\/\/dl.acm.org\/citation.cfm?id=1413370.1413375"},{"key":"12_CR7","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"642","DOI":"10.1007\/978-3-642-03869-3_61","volume-title":"Euro-Par 2009 Parallel Processing","author":"H Dursun","year":"2009","unstructured":"Dursun, H., et al.: A multilevel parallelization framework for high-order stencil computations. In: Sips, H., Epema, D., Lin, H.-X. (eds.) Euro-Par 2009. LNCS, vol. 5704, pp. 642\u2013653. Springer, Heidelberg (2009). \n                    https:\/\/doi.org\/10.1007\/978-3-642-03869-3_61"},{"key":"12_CR8","doi-asserted-by":"publisher","unstructured":"Henretty, T., Veras, R., Franchetti, F., Pouchet, L.N., Ramanujam, J., Sadayappan, P.: A stencil compiler for short-vector SIMD architectures. In: Proceedings of the 27th International ACM Conference on Supercomputing, pp. 13\u201324. ACM (2013). \n                    https:\/\/doi.org\/10.1145\/2464996.2467268\n                    \n                  . \n                    http:\/\/doi.acm.org\/10.1145\/2464996.2467268","DOI":"10.1145\/2464996.2467268"},{"key":"12_CR9","unstructured":"Hern\u00e1ndez, M., Cebri\u00e1n, J.M., Cecilia, J.M., Garc\u00eda, J.M.: Evaluation of 3-D stencil codes on the Intel Xeon Phi coprocessor. In: Parallel Computing (ParCo) 2015, Edimburgo, Reino Unido, September 2015. \n                    http:\/\/www.ditec.um.es\/~jmgarcia\/papers\/parco-2015.pdf"},{"key":"12_CR10","volume-title":"Intel Xeon Phi Coprocessor High Performance Programming","author":"J Jeffers","year":"2013","unstructured":"Jeffers, J., Reinders, J.: Intel Xeon Phi Coprocessor High Performance Programming. Morgan Kaufmann Publishers Inc., Boston (2013)"},{"key":"12_CR11","doi-asserted-by":"publisher","unstructured":"Kamil, S., Datta, K., Williams, S., Oliker, L., Shalf, J., Yelick, K.: Implicit and explicit optimizations for stencil computations. In: Proceedings of the Workshop on Memory System Performance and Correctness, MSPC 2006, pp. 51\u201360. ACM, New York, USA (2006). \n                    https:\/\/doi.org\/10.1145\/1178597.1178605\n                    \n                  . \n                    http:\/\/doi.acm.org\/10.1145\/1178597.1178605","DOI":"10.1145\/1178597.1178605"},{"key":"12_CR12","doi-asserted-by":"publisher","unstructured":"Kamil, S., Husbands, P., Oliker, L., Shalf, J., Yelick, K.: Impact of modern memory subsystems on cache optimizations for stencil computations. In: Proceedings of the 2005 Workshop on Memory System Performance, MSP 2005, pp. 36\u201343. ACM, New York, NY, USA (2005). \n                    https:\/\/doi.org\/10.1145\/1111583.1111589\n                    \n                  . \n                    http:\/\/doi.acm.org\/10.1145\/1111583.1111589","DOI":"10.1145\/1111583.1111589"},{"key":"12_CR13","doi-asserted-by":"publisher","unstructured":"Krishnamoorthy, S., Baskaran, M., Bondhugula, U., Ramanujam, J., Rountev, A., Sadayappan, P.: Effective automatic parallelization of stencil computations. In: Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, PLDI 2007, pp. 235\u2013244. ACM, New York, USA (2007). \n                    https:\/\/doi.org\/10.1145\/1250734.1250761\n                    \n                  . \n                    http:\/\/doi.acm.org\/10.1145\/1250734.1250761","DOI":"10.1145\/1250734.1250761"},{"key":"12_CR14","doi-asserted-by":"publisher","first-page":"199","DOI":"10.1016\/B978-0-12-415993-8.00007-4","volume-title":"Structured Parallel Programming","author":"Michael McCool","year":"2012","unstructured":"McCool, M., Robison, A.D., Reinders, J.: Stencil and recurrence. In: Structured Parallel Programming: Patterns for Efficient Computation, pp. 199\u2013207. Morgan Kaufmann Publishers Inc., Boston, MA, USA (2012). \n                    https:\/\/doi.org\/10.1016\/B978-0-12-415993-8.00007-4\n                    \n                  . \n                    http:\/\/www.sciencedirect.com\/science\/article\/pii\/B9780124159938000074"},{"key":"12_CR15","unstructured":"MPI: The Message Passing Interface (MPI) standard, 23 May 2019. \n                    http:\/\/www.mcs.anl.gov\/research\/projects\/mpi\/"},{"key":"12_CR16","unstructured":"OpenMP: OpenMP Architecture Review Board: The OpenMP Specification, 23 May 2019. \n                    http:\/\/www.openmp.org\/"},{"key":"12_CR17","unstructured":"Pearce, M.: What is code modernization? (2015). \n                    https:\/\/software.intel.com\/en-us\/articles\/what-is-code-modernization"},{"key":"12_CR18","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4302-5927-5","volume-title":"Intel Xeon Phi Coprocessor Architecture and Tools: The Guide for Application Developers","author":"R Rahman","year":"2013","unstructured":"Rahman, R.: Intel Xeon Phi Coprocessor Architecture and Tools: The Guide for Application Developers, 1st edn. Apress, Berkely (2013)","edition":"1"},{"key":"12_CR19","doi-asserted-by":"publisher","unstructured":"Rahman, S.M.F., Yi, Q., Qasem, A.: Understanding stencil code performance on multicore architectures. In: Proceedings of the 8th ACM International Conference on Computing Frontiers, CF 2011, pp. 30:1\u201330:10. ACM, New York, NY, USA (2011). \n                    https:\/\/doi.org\/10.1145\/2016604.2016641\n                    \n                  . \n                    http:\/\/doi.acm.org\/10.1145\/2016604.2016641","DOI":"10.1145\/2016604.2016641"},{"key":"12_CR20","volume-title":"High Performance Parallelism Pearls: Multicore and Many-Core Programming Approaches","year":"2015","unstructured":"Reinders, J., Jeffers, J. (eds.): High Performance Parallelism Pearls: Multicore and Many-Core Programming Approaches, vol. 2, 1st edn. Morgan Kaufmann Publishers Inc., Boston (2015)","edition":"1"},{"key":"12_CR21","unstructured":"Reinders, J., Jeffers, J.: Characterization and auto-tuning of 3DFD. In: High Performance Parallelism Pearls, Multicore and Many-Core Programming Approaches, pp. 377\u2013396. Morgan Kaufmann (2014)"},{"key":"12_CR22","unstructured":"Rosales, C., et al.: KNL utilization guidelines. Technical report, TR-16-03, Texas Advanced Computing Center, The University (2016)"},{"key":"12_CR23","doi-asserted-by":"publisher","first-page":"441","DOI":"10.1016\/B978-0-12-803819-2.00015-X","volume-title":"High Performance Parallelism Pearls","author":"Michael Seaton","year":"2015","unstructured":"Seaton, M., Mason, L., Matveev, Z.A., Blair-Chappell, S.: Vectorization advice. In: Reinders, J., Jeffers, J. (eds.) High Performance Parallelism Pearls Volume Two: Multicore and Many-Core Programming Approaches, vol. 2, pp. 441\u2013462. Morgan Kaufmann, Boston, MA, USA (2015). \n                    https:\/\/doi.org\/10.1016\/B978-0-12-803819-2.00015-X\n                    \n                  . \n                    http:\/\/www.sciencedirect.com\/science\/article\/pii\/B978012803819200015X"},{"key":"12_CR24","unstructured":"Strzodka, R., Shaheen, M., Pajak, D., Pomeranian, W.: Impact of system and cache bandwidth on stencil computations across multiple processor generations. In: Proceedings of the Workshop on Applications for Multi-and Many-Core Processors (A4MMC) at ISCA (2011)"},{"key":"12_CR25","doi-asserted-by":"publisher","unstructured":"Tang, Y., Chowdhury, R.A., Kuszmaul, B.C., Luk, C.K., Leiserson, C.E.: The pochoir stencil compiler. In: Proceedings of the Twenty-Third Annual ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2011, pp. 117\u2013128. ACM, New York, NY, USA (2011). \n                    https:\/\/doi.org\/10.1145\/1989493.1989508\n                    \n                  . \n                    http:\/\/doi.acm.org\/10.1145\/1989493.1989508","DOI":"10.1145\/1989493.1989508"},{"key":"12_CR26","volume-title":"Multigrid","author":"U Trottenberg","year":"2000","unstructured":"Trottenberg, U., Oosterlee, C.W., Schuller, A.: Multigrid. Academic Press, Cambridge (2000)"},{"key":"12_CR27","unstructured":"Vladimirov, A., Asai, R., Karpusenko, V. (eds.): Parallel Programming and Optimization with Intel Xeon Phi Coprocessors, vol. 1, 2nd edn. Colfax International, CA, USA (2015)"}],"container-title":["Communications in Computer and Information Science","Technologies and Innovation"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-030-34989-9_12","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,11,19]],"date-time":"2019-11-19T19:27:30Z","timestamp":1574191650000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-030-34989-9_12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019]]},"ISBN":["9783030349882","9783030349899"],"references-count":27,"URL":"https:\/\/doi.org\/10.1007\/978-3-030-34989-9_12","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2019]]},"assertion":[{"value":"20 November 2019","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"CITI","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Technologies and Innovation","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Guayaquil","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Ecuador","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2019","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2 December 2019","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"5 December 2019","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"5","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"citi2019","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/congresos.uagraria.edu.ec\/citi\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Single-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Easychair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"32","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"14","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"0","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"44% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"3","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"-","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"No","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}