{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T19:02:28Z","timestamp":1743015748559,"version":"3.40.3"},"publisher-location":"Cham","reference-count":16,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783030389901"},{"type":"electronic","value":"9783030389918"}],"license":[{"start":{"date-parts":[[2020,1,1]],"date-time":"2020-01-01T00:00:00Z","timestamp":1577836800000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020]]},"DOI":"10.1007\/978-3-030-38991-8_1","type":"book-chapter","created":{"date-parts":[[2020,1,21]],"date-time":"2020-01-21T20:34:32Z","timestamp":1579638872000},"page":"3-16","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["PPS: A Low-Latency and Low-Complexity Switching Architecture Based on Packet Prefetch and Arbitration Prediction"],"prefix":"10.1007","author":[{"given":"Yi","family":"Dai","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ke","family":"Wu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mingche","family":"Lai","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Qiong","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dezun","family":"Dong","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2020,1,22]]},"reference":[{"key":"1_CR1","volume-title":"Principles and Practices of Interconnection Networks","author":"W Dally","year":"2003","unstructured":"Dally, W., Towles, B.: Principles and Practices of Interconnection Networks. Morgan Kaufmann Publishers Inc., San Francisco (2003)"},{"key":"1_CR2","doi-asserted-by":"crossref","unstructured":"Chrysos, N., Minkenberg, C., Rudquist, M., et al.: SCOC: high-radix switches made of bufferless clos networks. In: IEEE International Symposium on High Performance Computer Architecture, pp. 402\u2013414. IEEE (2015)","DOI":"10.1109\/HPCA.2015.7056050"},{"issue":"2","key":"1_CR3","doi-asserted-by":"publisher","first-page":"420","DOI":"10.1145\/1080695.1070005","volume":"33","author":"J Kim","year":"2005","unstructured":"Kim, J., Dally, W.J., Towles, B., et al.: Microarchitecture of a high-radix router. ACM SIGARCH Comput. Archit. News 33(2), 420\u2013431 (2005)","journal-title":"ACM SIGARCH Comput. Archit. News"},{"key":"1_CR4","doi-asserted-by":"crossref","unstructured":"Ahn, J.H., Choo, S., Kim, J.: Network within a network approach to create a scalable high-radix router microarchitecture. In: IEEE International Symposium on High Performance Computer Architecture, pp. 1\u201312. IEEE (2012)","DOI":"10.1109\/HPCA.2012.6169048"},{"issue":"7","key":"1_CR5","doi-asserted-by":"publisher","first-page":"928","DOI":"10.1109\/TC.2008.39","volume":"57","author":"AM Vicente","year":"2008","unstructured":"Vicente, A.M., Apostolopoulos, G., Alfaro, F.J., et al.: Efficient deadline-based QoS algorithms for high-performance networks. IEEE Trans. Comput. 57(7), 928\u2013939 (2008)","journal-title":"IEEE Trans. Comput."},{"issue":"2","key":"1_CR6","doi-asserted-by":"publisher","first-page":"703","DOI":"10.1145\/3140659.3080253","volume":"45","author":"Masoumeh Ebrahimi","year":"2017","unstructured":"Ebrahimi, M., Daneshtalab, M.: EbDa: a new theory on design and verification of deadlock-free interconnection networks. In: International Symposium on Computer Architecture, pp. 703\u2013715. ACM (2017)","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"1_CR7","unstructured":"InfiniBand Trade Association: InfiniBandTM Architecture Specification Volume 1, Release 1.0, October 2000. \nwww.infinibandta.org"},{"issue":"2","key":"1_CR8","doi-asserted-by":"publisher","first-page":"188","DOI":"10.1109\/90.769767","volume":"7","author":"N Mckeown","year":"1999","unstructured":"Mckeown, N.: The iSLIP scheduling algorithm for input-queued switches. IEEE\/ACM Trans. Networking 7(2), 188\u2013201 (1999)","journal-title":"IEEE\/ACM Trans. Networking"},{"issue":"12","key":"1_CR9","doi-asserted-by":"publisher","first-page":"1347","DOI":"10.1109\/TCOM.1987.1096719","volume":"COM\u201335","author":"M Karol","year":"1987","unstructured":"Karol, M., Hluchyj, M., Morgan, S.: Input versus output queueing on a space-division packet switch. IEEE Trans. Commun. COM\u201335(12), 1347\u20131356 (1987)","journal-title":"IEEE Trans. Commun."},{"key":"1_CR10","doi-asserted-by":"crossref","unstructured":"Zhang, H., Wang, K., Dai, Y., et al.: A multi-VC dynamically shared buffer with prefetch for network on chip. In: IEEE International Conference on Networking, Architecture and Storage, pp. 320\u2013327. IEEE (2012)","DOI":"10.1109\/NAS.2012.39"},{"issue":"2","key":"1_CR11","doi-asserted-by":"publisher","first-page":"62","DOI":"10.1109\/2.191995","volume":"26","author":"LM Ni","year":"1993","unstructured":"Ni, L.M., Mckinley, P.K.: A survey of wormhole routing techniques in direct networks. Computer 26(2), 62\u201376 (1993)","journal-title":"Computer"},{"issue":"8","key":"1_CR12","doi-asserted-by":"publisher","first-page":"841","DOI":"10.1109\/71.532115","volume":"7","author":"J Duato","year":"1996","unstructured":"Duato, J.: A necessary and sufficient condition for deadlock-free routing in cut-through and store-and-forward networks. IEEE Trans. Parallel Distrib. Syst. 7(8), 841\u2013854 (1996)","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"issue":"4","key":"1_CR13","doi-asserted-by":"publisher","first-page":"4","DOI":"10.1016\/j.comnet.2014.04.006","volume":"66","author":"P Kermani","year":"2014","unstructured":"Kermani, P., Kleinrock, L.: Virtual cut-through: a new computer communication switching technique. Comput. Netw. 66(4), 4\u201317 (2014)","journal-title":"Comput. Netw."},{"key":"1_CR14","unstructured":"Chen, L., Pinkston, T.M.: Worm-bubble flow control. In: 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA 2013), pp. 366\u2013377. IEEE (2013)"},{"key":"1_CR15","doi-asserted-by":"crossref","unstructured":"Abts, D., Abts, D., Kim, J., et al.: The BlackWidow high-radix clos network. In: International Symposium on Computer Architecture, pp. 16\u201328. IEEE (2006)","DOI":"10.1145\/1150019.1136488"},{"issue":"4","key":"1_CR16","doi-asserted-by":"publisher","first-page":"738","DOI":"10.1109\/TPDS.2018.2873337","volume":"30","author":"Y Dai","year":"2018","unstructured":"Dai, Y., Lu, K., Xiao, L., et al.: A cost-efficient router architecture for HPC inter-connection networks: design and implementation. IEEE Trans. Parallel Distrib. Syst. 30(4), 738\u2013753 (2018)","journal-title":"IEEE Trans. Parallel Distrib. Syst."}],"container-title":["Lecture Notes in Computer Science","Algorithms and Architectures for Parallel Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-030-38991-8_1","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,1,22]],"date-time":"2020-01-22T00:49:59Z","timestamp":1579654199000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-030-38991-8_1"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020]]},"ISBN":["9783030389901","9783030389918"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-030-38991-8_1","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2020]]},"assertion":[{"value":"22 January 2020","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ICA3PP","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Algorithms and Architectures for Parallel Processing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Melbourne, VIC","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Australia","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2019","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"9 December 2019","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"11 December 2019","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"19","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"ica3pp2019","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/nsclab.org\/ica3pp2019\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Single-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Easychair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"251","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"73","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"29","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"29% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"2.4","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"5.8","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"No","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}