{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,27]],"date-time":"2025-03-27T10:06:36Z","timestamp":1743069996154,"version":"3.40.3"},"publisher-location":"Cham","reference-count":10,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783030790240"},{"type":"electronic","value":"9783030790257"}],"license":[{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021]]},"DOI":"10.1007\/978-3-030-79025-7_4","type":"book-chapter","created":{"date-parts":[[2021,6,22]],"date-time":"2021-06-22T23:07:48Z","timestamp":1624403268000},"page":"50-64","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Timing Optimization for Virtual FPGA Configurations"],"prefix":"10.1007","author":[{"given":"Linus","family":"Witschen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tobias","family":"Wiersema","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masood Raeisi","family":"Nafchi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arne","family":"Bockhorn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marco","family":"Platzner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2021,6,23]]},"reference":[{"key":"4_CR1","doi-asserted-by":"publisher","unstructured":"Betz, V., Rose, J., Marquardt, A.: Architecture and CAD for Deep-Submicron FPGAS. The Springer International Series in Engineering and Computer Science, vol. 497. Kluwer, New York (1999). https:\/\/doi.org\/10.1007\/978-1-4615-5145-4","DOI":"10.1007\/978-1-4615-5145-4"},{"key":"4_CR2","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"93","DOI":"10.1007\/978-3-319-56258-2_9","volume-title":"Applied Reconfigurable Computing","author":"T Bollengier","year":"2017","unstructured":"Bollengier, T., Lagadec, L., Najem, M., Le Lann, J.-C., Guilloux, P.: Soft timing closure for soft programmable logic cores: the ARGen approach. In: Wong, S., Beck, A.C., Bertels, K., Carro, L. (eds.) ARC 2017. LNCS, vol. 10216, pp. 93\u2013105. Springer, Cham (2017). https:\/\/doi.org\/10.1007\/978-3-319-56258-2_9"},{"key":"4_CR3","doi-asserted-by":"publisher","unstructured":"Brant, A.D., Lemieux, G.G.F.: ZUMA: an open FPGA overlay architecture. In: International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 93\u201396. IEEE (2012). https:\/\/doi.org\/10.1109\/FCCM.2012.25. https:\/\/github.com\/adbrant\/zuma-fpga","DOI":"10.1109\/FCCM.2012.25"},{"key":"4_CR4","unstructured":"Knodel, O., Genssler, P.R., Spallek, R.G.: Virtualizing reconfigurable hardware to provide scalability in cloud architectures. In: Mady, A.E.D., Bostelmann, T., Sawitzki, S. (eds.) The Tenth International Conference on Advances in Circuits, Electronics and Micro-electronics (CENICS), pp. 33\u201338. IARIA (2017)"},{"key":"4_CR5","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"357","DOI":"10.1007\/3-540-44687-7_37","volume-title":"Field-Programmable Logic and Applications","author":"L Lagadec","year":"2001","unstructured":"Lagadec, L., Lavenier, D., Fabiani, E., Pottier, B.: Placing, routing, and editing virtual FPGAs. In: Brebner, G., Woods, R. (eds.) FPL 2001. LNCS, vol. 2147, pp. 357\u2013366. Springer, Heidelberg (2001). https:\/\/doi.org\/10.1007\/3-540-44687-7_37"},{"key":"4_CR6","doi-asserted-by":"publisher","unstructured":"Lavin, C., Kaviani, A.: Build your own domain-specific solutions with RapidWright: invited tutorial. In: Bazargan, K., Neuendorffer, S. (eds.) Proceedings of the 2019 ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays, (FPGA), pp. 14\u201322. ACM (2019). https:\/\/doi.org\/10.1145\/3289602.3293928","DOI":"10.1145\/3289602.3293928"},{"key":"4_CR7","doi-asserted-by":"publisher","unstructured":"Murray, K.E., et al.: VTR 8: high performance CAD and customizable FPGA architecture modelling. ACM Trans. Reconfigurable Technol. Syst. 13(2) (2020). https:\/\/doi.org\/10.1145\/3388617. https:\/\/verilogtorouting.org","DOI":"10.1145\/3388617"},{"key":"4_CR8","doi-asserted-by":"publisher","unstructured":"Vaishnav, A., Pham, K.D., Koch, D.: A survey on FPGA virtualization. In: Proceedings of the 28th International Conference on Field Programmable Logic and Applications (FPL), pp. 131\u2013138. IEEE (2018). https:\/\/doi.org\/10.1109\/FPL.2018.00031","DOI":"10.1109\/FPL.2018.00031"},{"key":"4_CR9","doi-asserted-by":"publisher","first-page":"112","DOI":"10.1016\/j.compeleceng.2016.04.005","volume":"55","author":"T Wiersema","year":"2016","unstructured":"Wiersema, T., Bockhorn, A., Platzner, M.: An architecture and design tool flow for embedding a virtual FPGA into a reconfigurable system-on-chip. Comput. Electr. Eng. 55, 112\u2013122 (2016). https:\/\/doi.org\/10.1016\/j.compeleceng.2016.04.005","journal-title":"Comput. Electr. Eng."},{"key":"4_CR10","doi-asserted-by":"publisher","unstructured":"Zha, Y., Li, J.: Virtualizing FPGAs in the cloud. In: Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). ACM (2020). https:\/\/doi.org\/10.1145\/3373376.3378491","DOI":"10.1145\/3373376.3378491"}],"container-title":["Lecture Notes in Computer Science","Applied Reconfigurable Computing. Architectures, Tools, and Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-030-79025-7_4","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,6,22]],"date-time":"2021-06-22T23:08:05Z","timestamp":1624403285000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-030-79025-7_4"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021]]},"ISBN":["9783030790240","9783030790257"],"references-count":10,"URL":"https:\/\/doi.org\/10.1007\/978-3-030-79025-7_4","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2021]]},"assertion":[{"value":"23 June 2021","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ARC","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Symposium on Applied Reconfigurable Computing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2021","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"29 June 2021","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"30 June 2021","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"17","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"arc2021","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/project.inria.fr\/arc2021\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Double-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"EasyChair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"36","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"14","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"11","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"39% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"4","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"3","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Yes","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}