{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,27]],"date-time":"2025-03-27T05:57:02Z","timestamp":1743055022026,"version":"3.40.3"},"publisher-location":"Cham","reference-count":20,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783030816810"},{"type":"electronic","value":"9783030816827"}],"license":[{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021]]},"DOI":"10.1007\/978-3-030-81682-7_14","type":"book-chapter","created":{"date-parts":[[2021,7,14]],"date-time":"2021-07-14T05:03:11Z","timestamp":1626238991000},"page":"213-228","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Evaluating Soft Error Mitigation Trade-offs During Early Design Stages"],"prefix":"10.1007","author":[{"given":"Hao","family":"Qiu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Bor-Tyng","family":"Lin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4788-956X","authenticated-orcid":false,"given":"Semiu A.","family":"Olowogemo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9291-689X","authenticated-orcid":false,"given":"William H.","family":"Robinson","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel B.","family":"Limbrick","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2021,7,15]]},"reference":[{"key":"14_CR1","doi-asserted-by":"crossref","unstructured":"Chatzidimitriou, A., Gizopoulos, D.: rACE: reverse-order processor reliability analysis. In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1115\u20131120. IEEE (2020)","DOI":"10.23919\/DATE48585.2020.9116355"},{"key":"14_CR2","doi-asserted-by":"crossref","unstructured":"Biswas, A., et al.: Computing architectural vulnerability factors for address-based structures. In: 32nd International Symposium on Computer Architecture (ISCA 2005), pp. 532\u2013543. IEEE (2005)","DOI":"10.1145\/1080695.1070014"},{"key":"14_CR3","doi-asserted-by":"crossref","unstructured":"Fang, B., et al.: ePVF: an enhanced program vulnerability factor methodology for cross-layer resilience analysis. In: 2016 Proceedings of the 46th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks, pp. 168\u2013179. IEEE (2016)","DOI":"10.1109\/DSN.2016.24"},{"key":"14_CR4","doi-asserted-by":"crossref","unstructured":"Shafique, M., Rehman, S., Aceituno, P.V., Henkel, J.: Exploiting program-level masking and error propagation for constrained reliability optimization. In: Proceedings of the 50th Annual Design Automation Conference, pp. 1\u20139 (2013)","DOI":"10.1145\/2463209.2488755"},{"issue":"9","key":"14_CR5","doi-asserted-by":"publisher","first-page":"1839","DOI":"10.1109\/TCAD.2017.2752705","volume":"37","author":"E Cheng","year":"2017","unstructured":"Cheng, E., et al.: Tolerating soft errors in processor cores using clear (cross-layer exploration for architecting resilience). IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 37(9), 1839\u20131852 (2017)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circ. Syst."},{"key":"14_CR6","doi-asserted-by":"crossref","unstructured":"Leem, L., et al.: ERSA: error resilient system architecture for probabilistic applications. In: 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), pp. 1560\u20131565. IEEE (2010)","DOI":"10.1109\/DATE.2010.5457059"},{"key":"14_CR7","doi-asserted-by":"crossref","unstructured":"Qiu, H., et al.: Gem5Panalyzer: a light-weight tool for early-stage architectural reliability evaluation & prediction. In: 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 482\u2013485. IEEE (2020)","DOI":"10.1109\/MWSCAS48704.2020.9184536"},{"key":"14_CR8","unstructured":"Guthaus, M.R., et al.: MiBench: a free, commercially representative embedded benchmark suite. In: Proceedings of the Fourth Annual IEEE International Workshop on Workload Characterization, pp. 3\u201314. IEEE (2001)"},{"key":"14_CR9","doi-asserted-by":"crossref","unstructured":"Sridharan, V., Kaeli, D.R.: Eliminating microarchitectural dependency from architectural vulnerability. In: 2009 IEEE 15th International Symposium on High Performance Computer Architecture, pp. 117\u2013128. IEEE (2009)","DOI":"10.1109\/HPCA.2009.4798243"},{"key":"14_CR10","doi-asserted-by":"crossref","unstructured":"Henkel, J., et al.: Reliable on-chip systems in the nano-era: lessons learnt and future trends. In: 2013 50th ACM\/EDAC\/IEEE Design Automation Conference (DAC), pp. 1\u201310. IEEE (2013)","DOI":"10.1145\/2463209.2488857"},{"key":"14_CR11","unstructured":"Mukherjee, S.S., et al.: A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor. In: 2003 Proceedings of the 36th Annual IEEE\/ACM International Symposium on Microarchitecture, MICRO-36, pp. 29\u201340. IEEE (2003)"},{"issue":"6","key":"14_CR12","doi-asserted-by":"publisher","first-page":"2547","DOI":"10.1109\/TNS.2015.2498313","volume":"62","author":"H Quinn","year":"2015","unstructured":"Quinn, H., et al.: Using benchmarks for radiation testing of microprocessors and FPGAs. IEEE Trans. Nucl. Sci. 62(6), 2547\u20132554 (2015)","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"14_CR13","unstructured":"Biswas, A., Soundararajan, N., Mukherjee, S.S., Gurumurthi, S.: Quantized AVF: a means of capturing vulnerability variations over small windows of time. In: IEEE Workshop on Silicon Errors in Logic-System Effects (2009)"},{"key":"14_CR14","doi-asserted-by":"crossref","unstructured":"Kaliorakis, M., Gizopoulos, D., Canal, R., Gonzalez, A.: MeRLiN: exploiting dynamic instruction behavior for fast and accurate microarchitecture level reliability assessment. In: Proceedings of the 44th Annual International Symposium on Computer Architecture, pp. 241\u2013254 (2017)","DOI":"10.1145\/3079856.3080225"},{"key":"14_CR15","doi-asserted-by":"crossref","unstructured":"Venkatagiri, R., et al.: Gem5-Approxilyzer: an open-source tool for application-level soft error analysis. In: Proceedings of the 49th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks, pp. 214\u2013221. IEEE (2019)","DOI":"10.1109\/DSN.2019.00033"},{"issue":"1","key":"14_CR16","doi-asserted-by":"publisher","first-page":"251","DOI":"10.1016\/j.microrel.2014.09.011","volume":"55","author":"J Jiao","year":"2015","unstructured":"Jiao, J., Juan, D.-C., Marculescu, D., Fu, Y.: Exploiting component dependency for accurate and efficient soft error analysis via Probabilistic Graphical Models. Microelectron. Reliab. 55(1), 251\u2013263 (2015)","journal-title":"Microelectron. Reliab."},{"issue":"7","key":"14_CR17","doi-asserted-by":"publisher","first-page":"41","DOI":"10.1145\/1543136.1542459","volume":"44","author":"J Lee","year":"2009","unstructured":"Lee, J., Shrivastava, A.: A compiler optimization to reduce soft errors in register files. ACM Sigplan Not. 44(7), 41\u201349 (2009)","journal-title":"ACM Sigplan Not."},{"key":"14_CR18","doi-asserted-by":"crossref","unstructured":"Rehman, S., Shafique, M., Kriebel, F., Henkel, J.: Reliable software for unreliable hardware: embedded code generation aiming at reliability. In: Proceedings of the International Conference on Hardware\/Software Codesign and System Synthesis, pp. 237\u2013246. IEEE (2011)","DOI":"10.1145\/2039370.2039408"},{"issue":"2","key":"14_CR19","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/2024716.2024718","volume":"39","author":"N Binkert","year":"2011","unstructured":"Binkert, N., et al.: The gem5 simulator. SIGARCH Comput. Archit. News 39(2), 1\u20137 (2011)","journal-title":"SIGARCH Comput. Archit. News"},{"key":"14_CR20","doi-asserted-by":"crossref","unstructured":"Chatzidimitriou, A., et al.: Demystifying soft error assessment strategies on arm CPUs: microarchitectural fault injection vs. neutron beam experiments. In: Proceedings of the 49th Annual IEEE\/IFIP International Conference on Dependable Systems and Networks, pp. 26\u201338. IEEE (2019)","DOI":"10.1109\/DSN.2019.00018"}],"container-title":["Lecture Notes in Computer Science","Architecture of Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-030-81682-7_14","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,7,20]],"date-time":"2021-07-20T23:13:39Z","timestamp":1626822819000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-030-81682-7_14"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021]]},"ISBN":["9783030816810","9783030816827"],"references-count":20,"URL":"https:\/\/doi.org\/10.1007\/978-3-030-81682-7_14","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2021]]},"assertion":[{"value":"15 July 2021","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ARCS","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Architecture of Computing Systems","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2021","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"7 June 2021","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"8 June 2021","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"34","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"arcs2021","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/arcs-conference.org","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Double-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"EasyChair","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"24","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"12","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"0","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"50% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"3,8","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"2,1","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Yes","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"2 additional workshop papers were peer-reviewed and accepted","order":10,"name":"additional_info_on_review_process","label":"Additional Info on Review Process","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}