{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,25]],"date-time":"2025-03-25T14:41:39Z","timestamp":1742913699843,"version":"3.40.3"},"publisher-location":"Cham","reference-count":16,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783030905385"},{"type":"electronic","value":"9783030905392"}],"license":[{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021]]},"DOI":"10.1007\/978-3-030-90539-2_27","type":"book-chapter","created":{"date-parts":[[2021,11,12]],"date-time":"2021-11-12T13:02:56Z","timestamp":1636722176000},"page":"406-415","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Leveraging HW Approximation for Exploiting Performance-Energy Trade-offs Within the Edge-Cloud Computing Continuum"],"prefix":"10.1007","author":[{"given":"Argyris","family":"Kokkinis","sequence":"first","affiliation":[]},{"given":"Aggelos","family":"Ferikoglou","sequence":"additional","affiliation":[]},{"given":"Dimitrios","family":"Danopoulos","sequence":"additional","affiliation":[]},{"given":"Dimosthenis","family":"Masouros","sequence":"additional","affiliation":[]},{"given":"Kostas","family":"Siozios","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2021,11,13]]},"reference":[{"key":"27_CR1","unstructured":"Xilinx. https:\/\/www.xilinx.com\/"},{"issue":"12","key":"27_CR2","doi-asserted-by":"publisher","first-page":"33","DOI":"10.1109\/MC.2007.443","volume":"40","author":"LA Barroso","year":"2007","unstructured":"Barroso, L.A., H\u00f6lzle, U.: The case for energy-proportional computing. Computer 40(12), 33\u201337 (2007)","journal-title":"Computer"},{"key":"27_CR3","doi-asserted-by":"publisher","unstructured":"Chippa, V.K., Chakradhar, S.T., Roy, K., Raghunathan, A.: Analysis and characterization of inherent application resilience for approximate computing. In: 2013 50th ACM\/EDAC\/IEEE Design Automation Conference (DAC), pp. 1\u20139 (2013). https:\/\/doi.org\/10.1145\/2463209.2488873","DOI":"10.1145\/2463209.2488873"},{"key":"27_CR4","doi-asserted-by":"publisher","unstructured":"Danopoulos, D., Kachris, C., Soudris, D.: A quantitative comparison for image recognition on accelerated heterogeneous cloud infrastructures, pp. 171\u2013189 (September 2019). https:\/\/doi.org\/10.1201\/9780429399602-8","DOI":"10.1201\/9780429399602-8"},{"key":"27_CR5","first-page":"100520","volume":"30","author":"D Danopoulos","year":"2021","unstructured":"Danopoulos, D., Kachris, C., Soudris, D.: Utilizing cloud FPGAs towards the open neural network standard. Sustain. Comput.: Inform. Syst. 30, 100520 (2021)","journal-title":"Sustain. Comput.: Inform. Syst."},{"key":"27_CR6","unstructured":"Finnerty, A., Ratigner, H.: Reduce power and cost by converting from floating point to fixed point. WP491 (v1. 0) (2017)"},{"key":"27_CR7","doi-asserted-by":"publisher","unstructured":"Guan, Y., et al.: FP-DNN: an automated framework for mapping deep neural networks onto FPGAs with RTL-HLS hybrid templates. In: 2017 IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), pp. 152\u2013159 (2017). https:\/\/doi.org\/10.1109\/FCCM.2017.25","DOI":"10.1109\/FCCM.2017.25"},{"key":"27_CR8","doi-asserted-by":"publisher","unstructured":"Guo, K., et al.: Angel-eye: a complete design flow for mapping CNN onto customized hardware. In: 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 24\u201329 (2016). https:\/\/doi.org\/10.1109\/ISVLSI.2016.129","DOI":"10.1109\/ISVLSI.2016.129"},{"key":"27_CR9","doi-asserted-by":"publisher","unstructured":"Homsirikamol, E., George, K.G.: Toward a new HLS-based methodology for FPGA benchmarking of candidates in cryptographic competitions: the Caesar contest case study. In: 2017 International Conference on Field Programmable Technology (ICFPT), pp. 120\u2013127 (2017). https:\/\/doi.org\/10.1109\/FPT.2017.8280129","DOI":"10.1109\/FPT.2017.8280129"},{"key":"27_CR10","unstructured":"Ko, J.H., Fromm, J., Philipose, M., Tashev, I., Zarar, S.: Precision scaling of neural networks for efficient audio processing. arXiv preprint arXiv:1712.01340 (2017)"},{"key":"27_CR11","doi-asserted-by":"publisher","first-page":"1591","DOI":"10.1109\/TCAD.2015.2513673","volume":"35","author":"R Nane","year":"2015","unstructured":"Nane, R., et al.: A survey and evaluation of FPGA high-level synthesis tools. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 35, 1591\u20131604 (2015). https:\/\/doi.org\/10.1109\/TCAD.2015.2513673","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"issue":"11","key":"27_CR12","doi-asserted-by":"publisher","first-page":"2623","DOI":"10.1109\/TCAD.2018.2857262","volume":"37","author":"H Saadat","year":"2018","unstructured":"Saadat, H., Bokhari, H., Parameswaran, S.: Minimally biased multipliers for approximate integer and floating-point multiplication. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 37(11), 2623\u20132635 (2018)","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst."},{"key":"27_CR13","doi-asserted-by":"crossref","unstructured":"Sharma, H., et al.: Bit fusion: bit-level dynamically composable architecture for accelerating deep neural network. In: 2018 ACM\/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), pp. 764\u2013775 (2018)","DOI":"10.1109\/ISCA.2018.00069"},{"key":"27_CR14","doi-asserted-by":"publisher","first-page":"7823","DOI":"10.1109\/ACCESS.2018.2890150","volume":"7","author":"A Shawahna","year":"2019","unstructured":"Shawahna, A., Sait, S.M., El-Maleh, A.: FPGA-based accelerators of deep learning networks for learning and classification: a review. IEEE Access 7, 7823\u20137859 (2019). https:\/\/doi.org\/10.1109\/ACCESS.2018.2890150","journal-title":"IEEE Access"},{"issue":"5","key":"27_CR15","doi-asserted-by":"publisher","first-page":"637","DOI":"10.1109\/JIOT.2016.2579198","volume":"3","author":"W Shi","year":"2016","unstructured":"Shi, W., Cao, J., Zhang, Q., Li, Y., Xu, L.: Edge computing: vision and challenges. IEEE Internet Things J. 3(5), 637\u2013646 (2016)","journal-title":"IEEE Internet Things J."},{"key":"27_CR16","doi-asserted-by":"publisher","unstructured":"Wess, M., Manoj, P.D.S., Jantsch, A.: Neural network based ECG anomaly detection on FPGA and trade-off analysis, pp. 1\u20134 (May 2017). https:\/\/doi.org\/10.1109\/ISCAS.2017.8050805","DOI":"10.1109\/ISCAS.2017.8050805"}],"container-title":["Lecture Notes in Computer Science","High Performance Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-030-90539-2_27","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,22]],"date-time":"2022-06-22T10:05:45Z","timestamp":1655892345000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-030-90539-2_27"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021]]},"ISBN":["9783030905385","9783030905392"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-030-90539-2_27","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2021]]},"assertion":[{"value":"13 November 2021","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ISC High Performance","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on High Performance Computing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2021","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"24 June 2021","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2 July 2021","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"36","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"supercomputing2021","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/www.isc-hpc.com\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Double-blind","order":1,"name":"type","label":"Type","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Linklings","order":2,"name":"conference_management_system","label":"Conference Management System","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"74","order":3,"name":"number_of_submissions_sent_for_review","label":"Number of Submissions Sent for Review","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"24","order":4,"name":"number_of_full_papers_accepted","label":"Number of Full Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"0","order":5,"name":"number_of_short_papers_accepted","label":"Number of Short Papers Accepted","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"32% - The value is computed by the equation \"Number of Full Papers Accepted \/ Number of Submissions Sent for Review * 100\" and then rounded to a whole number.","order":6,"name":"acceptance_rate_of_full_papers","label":"Acceptance Rate of Full Papers","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"4.28","order":7,"name":"average_number_of_reviews_per_paper","label":"Average Number of Reviews per Paper","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"4.13","order":8,"name":"average_number_of_papers_per_reviewer","label":"Average Number of Papers per Reviewer","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"Yes","order":9,"name":"external_reviewers_involved","label":"External Reviewers Involved","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}},{"value":"In the ISC High Performance Workshop, there were 49 submissions, out of which 35  were accepted.","order":10,"name":"additional_info_on_review_process","label":"Additional Info on Review Process","group":{"name":"ConfEventPeerReviewInformation","label":"Peer Review Information (provided by the conference organizers)"}}]}}