{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,25]],"date-time":"2025-03-25T17:56:22Z","timestamp":1742925382650,"version":"3.40.3"},"publisher-location":"Cham","reference-count":32,"publisher":"Springer Nature Switzerland","isbn-type":[{"type":"print","value":"9783031168178"},{"type":"electronic","value":"9783031168185"}],"license":[{"start":{"date-parts":[[2022,1,1]],"date-time":"2022-01-01T00:00:00Z","timestamp":1640995200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2022,1,1]],"date-time":"2022-01-01T00:00:00Z","timestamp":1640995200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022]]},"DOI":"10.1007\/978-3-031-16818-5_3","type":"book-chapter","created":{"date-parts":[[2022,9,28]],"date-time":"2022-09-28T07:07:51Z","timestamp":1664348871000},"page":"49-70","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Transformative Hardware Design Following the\u00a0Model-Driven Architecture Vision"],"prefix":"10.1007","author":[{"given":"Zhao","family":"Han","sequence":"first","affiliation":[]},{"given":"Gabriel","family":"Rutsch","sequence":"additional","affiliation":[]},{"given":"Deyan","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Bowen","family":"Li","sequence":"additional","affiliation":[]},{"given":"Sebastian Siegfried","family":"Prebeck","sequence":"additional","affiliation":[]},{"given":"Daniela Sanchez","family":"Lopera","sequence":"additional","affiliation":[]},{"given":"Keerthikumara","family":"Devarajegowda","sequence":"additional","affiliation":[]},{"given":"Wolfgang","family":"Ecker","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2022,9,22]]},"reference":[{"key":"3_CR1","doi-asserted-by":"crossref","unstructured":"Shacham, O., et al.: Avoiding game over: bringing design to the next level. In: DAC Design Automation Conference 2012, pp. 623\u2013629. IEEE (2012)","DOI":"10.1145\/2228360.2228472"},{"key":"3_CR2","doi-asserted-by":"crossref","unstructured":"Bachrach, J., et al.: Chisel: constructing hardware in a scala embedded language. In: DAC Design Automation Conference 2012, pp. 1212\u20131221. IEEE (2012)","DOI":"10.1145\/2228360.2228584"},{"key":"3_CR3","doi-asserted-by":"crossref","unstructured":"Izraelevitz, A., et al.: Reusability is FIRRTL ground: hardware construction languages, compiler frameworks, and transformations. In: Proceedings of the 36th International Conference on Computer-Aided Design, pp. 209\u2013216. IEEE Press (2017)","DOI":"10.1109\/ICCAD.2017.8203780"},{"key":"3_CR4","doi-asserted-by":"crossref","unstructured":"Clow, J., Tzimpragos, G., Dangwal, D., Guo, S., McMahan, J., Sherwood, T.: A pythonic approach for rapid hardware prototyping and instrumentation. In: 2017 27th International Conference on Field Programmable Logic and Applications (FPL), pp. 1\u20137. IEEE (2017)","DOI":"10.23919\/FPL.2017.8056860"},{"issue":"4","key":"3_CR5","doi-asserted-by":"publisher","first-page":"58","DOI":"10.1109\/MM.2020.2997638","volume":"40","author":"S Jiang","year":"2020","unstructured":"Jiang, S., Pan, P., Ou, Y., Batten, C.: PyMTL3: a python framework for open-source hardware modeling, generation, simulation, and verification. IEEE Micro 40(4), 58\u201366 (2020)","journal-title":"IEEE Micro"},{"key":"3_CR6","unstructured":"Tim, N., Megan, W.: RISC-V external debug support version 0.13.2. Technical report, SiFive Inc. (2019)"},{"key":"3_CR7","unstructured":"ISO, ISO26262: 26262: Road Vehicles-Functional Safety. International Standard ISO\/FDIS, vol. 26262 (2011)"},{"key":"3_CR8","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"220","DOI":"10.1007\/BFb0053381","volume-title":"ECOOP\u201997 \u2014 Object-Oriented Programming","author":"G Kiczales","year":"1997","unstructured":"Kiczales, G., et al.: Aspect-oriented programming. In: Ak\u015fit, M., Matsuoka, S. (eds.) ECOOP 1997. LNCS, vol. 1241, pp. 220\u2013242. Springer, Heidelberg (1997). https:\/\/doi.org\/10.1007\/BFb0053381"},{"key":"3_CR9","unstructured":"Marconi, S., Conti, E., Placidi, P., Christiansen, J., Hemperek, T.: IEEE standard for SystemVerilog-unified hardware design, specification, and verification language (2013)"},{"key":"3_CR10","unstructured":"Traber, A., et al.: PULPino: a small single-core RISC-V SoC. In: 3rd RISCV Workshop (2016)"},{"key":"3_CR11","unstructured":"Asanovic, K., et al.: The rocket chip generator. EECS Department, University of California, Berkeley, Technical report UCB\/EECS-2016-17 (2016)"},{"key":"3_CR12","doi-asserted-by":"crossref","unstructured":"Gajski, D.D., Wu, A.C.-H., Chaiyakul, V., Mori, S., Nukiyama, T., Bricaud, P.: Embedded tutorial: essential issues for IP reuse. In: Proceedings of the 2000 Asia and South Pacific Design Automation Conference, pp. 37\u201342 (2000)","DOI":"10.1145\/368434.368504"},{"issue":"6\u20139","key":"3_CR13","doi-asserted-by":"publisher","first-page":"557","DOI":"10.1016\/0898-1221(92)90124-Z","volume":"23","author":"H Ehrig","year":"1992","unstructured":"Ehrig, H., Habel, A., Kreowski, H.-J.: Introduction to graph grammars with applications to semantic networks. Comput. Math. Appl. 23(6\u20139), 557\u2013572 (1992)","journal-title":"Comput. Math. Appl."},{"key":"3_CR14","doi-asserted-by":"crossref","unstructured":"Ecker, W., Devarajegowda, K., Werner, M., Han, Z., Servadei, L.: Embedded systems\u2019 automation following OMG\u2019s model driven architecture vision. In: 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 1301\u20131306. IEEE (2019)","DOI":"10.23919\/DATE.2019.8715154"},{"key":"3_CR15","unstructured":"Moiseev, M., Popov, R., Klotchkov, I.: SystemC-to-verilog compiler: a productivity-focused tool for hardware design in cycle-accurate SystemC. In: Design and Verification Conference and Exhibition (DVCon) Europe (2020)"},{"key":"3_CR16","doi-asserted-by":"publisher","first-page":"183","DOI":"10.1007\/978-1-4020-5646-8_9","volume-title":"Radiation Effects on Embedded Systems","author":"C L\u00f3pez-Ongil","year":"2007","unstructured":"L\u00f3pez-Ongil, C., Entrena, L., Garc\u00eda-Valderas, M., Portela-Garc\u00eda, M.: Automatic tools for design hardening. In: Velazco, R., Fouillat, P., Reis, R. (eds.) Radiation Effects on Embedded Systems, pp. 183\u2013200. Springer, Dordrecht (2007). https:\/\/doi.org\/10.1007\/978-1-4020-5646-8_9"},{"key":"3_CR17","doi-asserted-by":"crossref","unstructured":"Reshadi, M.H., Gharehbaghi, A.M., Navabi, Z.: AIRE\/CE: a revision towards CAD tool integration. In: ICM 2000. Proceedings of the 12th International Conference on Microelectronics. (IEEE Cat. No. 00EX453), pp. 277\u2013280 (2000)","DOI":"10.1109\/ICM.2000.916460"},{"key":"3_CR18","unstructured":"Kleppe, A.G., Warmer, J., Warmer, J.B., Bast, W.: MDA Explained: The Model Driven Architecture: Practice and Promise. Addison-Wesley Professional (2003)"},{"key":"3_CR19","doi-asserted-by":"crossref","unstructured":"Han, Z., Devarajegowda, K., Werner, M., Ecker, W.: Towards a python-based one language ecosystem for embedded systems automation. In: 2019 IEEE Nordic Circuits and Systems Conference (NorCAS): NORCHIP and International Symposium of System-on-Chip (SoC), pp. 1\u20137. IEEE (2019)","DOI":"10.1109\/NORCHIP.2019.8906949"},{"key":"3_CR20","unstructured":"I. Societies and the Standards Coordinating Committees of the IEEE Standards Association (IEEE-SA) Standards Board. IEEE Standard VHDL Language Reference Manual. IEEE (2000)"},{"key":"3_CR21","unstructured":"Sutherland, S.: The IEEE Verilog 1364\u20132001 standard what\u2019s new, and why you need it. In: 9th International HDL Conference (HDLCon) (2000)"},{"key":"3_CR22","doi-asserted-by":"crossref","unstructured":"Schreiner, J., Findenigy, R., Ecker, W.: Design centric modeling of digital hardware. In: 2016 IEEE International High-Level Design Validation and Test Workshop (HLDVT), pp. 46\u201352. IEEE (2016)","DOI":"10.1109\/HLDVT.2016.7748254"},{"key":"3_CR23","unstructured":"Schreiner, J., Willgerodt, F., Ecker, W.: A new approach for generating view generators. In: Design and Verification Conference and Exhibition (DVCon) (2017)"},{"key":"3_CR24","doi-asserted-by":"crossref","unstructured":"Han, Z., et al.: Aspect-oriented design automation with model transformation. In: 2021 IFIP\/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). IEEE (2021)","DOI":"10.1109\/VLSI-SoC53125.2021.9606984"},{"key":"3_CR25","unstructured":"Han, Z., Devarajegowda, K., Neumeier, A., Ecker, W.: IP-coding style variants in a multi-layer generator framework. In: Design and Verification Conference and Exhibition (DVCon) Europe (2020)"},{"issue":"2","key":"3_CR26","doi-asserted-by":"publisher","first-page":"249","DOI":"10.1006\/jcss.2001.1790","volume":"64","author":"F Drewes","year":"2002","unstructured":"Drewes, F., Hoffmann, B., Plump, D.: Hierarchical Graph Transformation. J. Comput. Syst. Sci. 64(2), 249\u2013283 (2002)","journal-title":"J. Comput. Syst. Sci."},{"key":"3_CR27","doi-asserted-by":"crossref","unstructured":"Bavache, V.B., Han, Z., Hartlieb, H., Kaja, E., Devarajegowda, K., Ecker, W.: Automated SoC hardening with model transformation. In: 2020 17th Biennial Baltic Electronics Conference (BEC), pp. 1\u20136. IEEE (2020)","DOI":"10.1109\/BEC49624.2020.9276994"},{"key":"3_CR28","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-2113-9","volume-title":"Fault-Tolerant Design","author":"E Dubrova","year":"2013","unstructured":"Dubrova, E.: Fault-Tolerant Design. Springer, Heidelberg (2013). https:\/\/doi.org\/10.1007\/978-1-4614-2113-9"},{"key":"3_CR29","unstructured":"Waterman, A., Asanovi\u0107, K.: The RISC-V instruction set manual. Volume I: Unprivileged v (2020)"},{"key":"#cr-split#-3_CR30.1","unstructured":"Devarajegowda, K., Ecker, W., Kunz, W.: How to keep 4-eyes principle in a design and property generation flow. In: MBMV 2019"},{"key":"#cr-split#-3_CR30.2","unstructured":"22nd Workshop-Methods and Description Languages for Modelling and Verification of Circuits and Systems, pp. 1-6. VDE (2019)"},{"key":"3_CR31","unstructured":"Patterson, D.A., Hennessy, J.L.: Computer Organization and Design: The Hardware\/Software Interface (2012)"}],"container-title":["IFIP Advances in Information and Communication Technology","VLSI-SoC: Technology Advancement on SoC Design"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-031-16818-5_3","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,10,4]],"date-time":"2024-10-04T20:52:52Z","timestamp":1728075172000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-031-16818-5_3"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022]]},"ISBN":["9783031168178","9783031168185"],"references-count":32,"URL":"https:\/\/doi.org\/10.1007\/978-3-031-16818-5_3","relation":{},"ISSN":["1868-4238","1868-422X"],"issn-type":[{"type":"print","value":"1868-4238"},{"type":"electronic","value":"1868-422X"}],"subject":[],"published":{"date-parts":[[2022]]},"assertion":[{"value":"22 September 2022","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"VLSI-SoC","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"IFIP\/IEEE International Conference on Very Large Scale Integration - System on a Chip","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2021","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"4 October 2021","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"8 October 2021","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"29","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"vlsi-soc2021","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/vlsisoc.github.io\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}