{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,27]],"date-time":"2025-03-27T12:11:06Z","timestamp":1743077466698,"version":"3.40.3"},"publisher-location":"Cham","reference-count":24,"publisher":"Springer Nature Switzerland","isbn-type":[{"type":"print","value":"9783031168178"},{"type":"electronic","value":"9783031168185"}],"license":[{"start":{"date-parts":[[2022,1,1]],"date-time":"2022-01-01T00:00:00Z","timestamp":1640995200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2022,1,1]],"date-time":"2022-01-01T00:00:00Z","timestamp":1640995200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022]]},"DOI":"10.1007\/978-3-031-16818-5_7","type":"book-chapter","created":{"date-parts":[[2022,9,28]],"date-time":"2022-09-28T07:07:51Z","timestamp":1664348871000},"page":"135-153","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Design and Mitigation Techniques of Radiation Induced SEEs on Open-Source Embedded Static RAMs"],"prefix":"10.1007","author":[{"given":"Sarah","family":"Azimi","sequence":"first","affiliation":[]},{"given":"Corrado","family":"De Sio","sequence":"additional","affiliation":[]},{"given":"Andrea","family":"Portaluri","sequence":"additional","affiliation":[]},{"given":"Luca","family":"Sterpone","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2022,9,22]]},"reference":[{"issue":"6","key":"7_CR1","first-page":"3273","volume":"57","author":"BD Sierawski","year":"2010","unstructured":"Sierawski, B.D., et al.: Muon-induced single event upsets in deep-submicron technology. IEEE Trans. Nucl. Sci. 57(6), 3273\u20133278 (2010)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"2","key":"7_CR2","doi-asserted-by":"publisher","first-page":"128","DOI":"10.1109\/TDSC.2004.14","volume":"1","author":"T Karnik","year":"2004","unstructured":"Karnik, T., Hazucha, P.: Characterization of soft errors caused by single event upsets in CMOS processes. IEEE Trans. Depend. Secure Comput. 1(2), 128\u2013143 (2004)","journal-title":"IEEE Trans. Depend. Secure Comput."},{"key":"7_CR3","doi-asserted-by":"publisher","first-page":"230","DOI":"10.1016\/j.microrel.2016.07.106","volume":"64","author":"S Azimi","year":"2016","unstructured":"Azimi, S., Du, B., Sterpone, L.: On the prediction of radiation-induced SETs in flash-based FPGAs. Microelectron. Reliab. 64, 230\u2013234 (2016)","journal-title":"Microelectron. Reliab."},{"issue":"3","key":"7_CR4","doi-asserted-by":"publisher","first-page":"583","DOI":"10.1109\/TNS.2003.813129","volume":"50","author":"PE Dodd","year":"2003","unstructured":"Dodd, P.E., Massengill, L.W.: Basic mechanisms and modeling of single-event upset in digital microelectronics. IEEE Trans. Nucl. Sci. 50(3), 583\u2013602 (2003)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"6","key":"7_CR5","doi-asserted-by":"publisher","first-page":"2334","DOI":"10.1109\/23.903774","volume":"47","author":"R Lacoe","year":"2000","unstructured":"Lacoe, R., et al.: Application of hardness-by-design methodology to radiation-tolerant ASIC technologies. IEEE Trans. Nuc. Sci. 47(6), 2334\u20132341 (2000)","journal-title":"IEEE Trans. Nuc. Sci."},{"key":"7_CR6","doi-asserted-by":"crossref","unstructured":"Yao, X., Clark, L.T., Patterson, D.W., Holbert, K.E.:Single event transient mitigation in cache memory using transient error checking circuits. In: IEEE Custom Integrated Circuits Conference 2010, San Jose, CA, USA, pp. 1\u20134 (2010)","DOI":"10.1109\/CICC.2010.5617439"},{"key":"7_CR7","doi-asserted-by":"crossref","unstructured":"Guthaus, M.R., Stine, J.E., Ataei, S., Chen, B., Wu, B., Sarwar, M.: OpenRAM: an open-source memory compiler. In: 2016 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), Austin, TX, USA, pp. 1\u20136 (2016)","DOI":"10.1145\/2966986.2980098"},{"key":"7_CR8","doi-asserted-by":"crossref","unstructured":"Azimi, S., Sio, C.D., Sterpone, L.: On the evaluation of SEEs on open-source embedded static RAMs. In: 2021 IFIP\/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), pp. 1\u20136 (2021)","DOI":"10.1109\/VLSI-SoC53125.2021.9606985"},{"key":"7_CR9","doi-asserted-by":"crossref","unstructured":"Azimi, S., Sterpone, L.: Digital design techniques for dependable high performance computing. In: IEEE International Test Conference (ITC), pp. 1\u201310 (2020)","DOI":"10.1109\/ITC44778.2020.9325281"},{"key":"7_CR10","doi-asserted-by":"crossref","unstructured":"Yoshimoto, S., et al.:A 40-nm 0.5-V 20.1-\u00b5W\/MHz 8T SRAM with low-energy disturb mitigation scheme. In: 2011 Symposium on VLSI Circuits - Digest of Technical Papers, Kyoto, Japan, pp. 72\u201373 (2011)","DOI":"10.1587\/transele.E95.C.572"},{"issue":"2","key":"7_CR11","doi-asserted-by":"publisher","first-page":"211","DOI":"10.1016\/S0026-2714(00)00218-3","volume":"41","author":"RC Baumann","year":"2001","unstructured":"Baumann, R.C., Smith, E.B.: Neutron-induced 10B fission as a major source of soft errors in high density SRAM. Microelectron. Reliab. 41(2), 211\u2013218 (2001)","journal-title":"Microelectron. Reliab."},{"key":"7_CR12","first-page":"2578","volume":"61","author":"Y-W Chiu","year":"2014","unstructured":"Chiu, Y.-W., et al.: 40nm bit-interleaving 12T subthreshold SRAM with data-aware write-assist. IEEE Trans. Circ. Syst. I 61, 2578\u20132688 (2014)","journal-title":"IEEE Trans. Circ. Syst. I"},{"issue":"6","key":"7_CR13","doi-asserted-by":"publisher","first-page":"2818","DOI":"10.1109\/TNS.2012.2220858","volume":"59","author":"N Seifert","year":"2012","unstructured":"Seifert, N., Kirsch, M.: Rea-time soft-error testing results of 45nm high-K metal gate, bulk CMOS SRAMs. IEEE Trans. Nucl. Sci. 59(6), 2818\u20132823 (2012)","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"7_CR14","doi-asserted-by":"crossref","unstructured":"Li, J., Chen, W., Li, R., Wang, G., Yang, S.: Study on transient ionizing radiation effect of 40nm SRAM. In: 3rd International Conference on Radiation Effects of Electronic Devices (ICREED), pp. 1\u20134 (2019)","DOI":"10.1109\/ICREED49760.2019.9205175"},{"key":"7_CR15","doi-asserted-by":"crossref","unstructured":"Mohr, K., Clark, L.: Delay and area efficient first-level cache soft error detection and correction. In: IEEE ICCD Proceedings, pp. 88\u201392, October 2006","DOI":"10.1109\/ICCD.2006.4380799"},{"key":"7_CR16","doi-asserted-by":"crossref","unstructured":"Hoang, T., et al.: A radiation hardened 16-Mb SRAM for space applications. In: IEEE Aerospace Conference, pp. 1\u20136 (2006)","DOI":"10.1109\/AERO.2007.353100"},{"key":"7_CR17","doi-asserted-by":"crossref","unstructured":"Mohammad, B.S., Saleh, H., Ismail, M.: design methodologies for yield enhancement and power efficiency in SRAM-based SoCs. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 23(10), 2054\u20132064 (2015)","DOI":"10.1109\/TVLSI.2014.2360319"},{"key":"7_CR18","doi-asserted-by":"crossref","unstructured":"Solokhina, T., et al.:Radiation tolerant heterogeneous Multicore \u201csystem on chip\u201d with built-in multichannel SpaceFibre switch for onboard data management and mass storage device: components, short paper. In: 2016 International SpaceWire Conference (SpaceWire), pp. 1\u20136 (2016)","DOI":"10.1109\/SpaceWire.2016.7771638"},{"key":"7_CR19","doi-asserted-by":"publisher","first-page":"518","DOI":"10.1109\/JSSC.2007.917509","volume":"43","author":"L Chang","year":"2008","unstructured":"Chang, L., et al.: An 8T-SRAM for variability tolerance and low-voltage operation in high-performance caches. IEEE J. Solid-State Circ. 43, 518\u2013529 (2008)","journal-title":"IEEE J. Solid-State Circ."},{"key":"7_CR20","doi-asserted-by":"publisher","first-page":"650","DOI":"10.1109\/JSSC.2008.2011972","volume":"44","author":"J Chang","year":"2009","unstructured":"Chang, J., et al.: A 32 Kb 10T sub-threshold SRAM array with bit-interleaving and differential read scheme in 90nm CMOS. IEEE J. Solid-State Circ. 44, 650\u2013658 (2009)","journal-title":"IEEE J. Solid-State Circ."},{"key":"7_CR21","doi-asserted-by":"crossref","unstructured":"Stine, J.E., et al.: FreePDK: an open-source variation-aware design kit. In: IEEE International Conference on Microelectronic Systems Education, pp. 173\u2013174 (2007)","DOI":"10.1109\/MSE.2007.44"},{"issue":"9","key":"7_CR22","doi-asserted-by":"publisher","first-page":"2034","DOI":"10.1109\/TNS.2020.3006997","volume":"67","author":"L Sterpone","year":"2020","unstructured":"Sterpone, L., Luoni, F., Azimi, S., Du, B.: A 3-D simulation-based approach to analyze heavy ions-induced SET on ditigal circuits. IEEE Trans. Nucl. Sci. 67(9), 2034\u20132041 (2020)","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"7_CR23","doi-asserted-by":"crossref","unstructured":"Azimi, S., De Sio, C., Sterponet, L.: A radiation-hardened CMOS full-adder based on layout selective transistor duplication. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 29(8), 1596\u20131600 (2021)","DOI":"10.1109\/TVLSI.2021.3086897"},{"key":"7_CR24","doi-asserted-by":"publisher","first-page":"818","DOI":"10.1007\/978-3-319-10590-1_53","volume-title":"Computer Vision \u2013 ECCV 2014","author":"MD Zeiler","year":"2014","unstructured":"Zeiler, M.D., Fergus, R.: Visualizing and understanding convolutional networks. In: Fleet, D., Pajdla, T., Schiele, B., Tuytelaars, T. (eds.) Computer Vision \u2013 ECCV 2014. LNCS, vol. 8689, pp. 818\u2013833. Springer, Cham (2014). https:\/\/doi.org\/10.1007\/978-3-319-10590-1_53"}],"container-title":["IFIP Advances in Information and Communication Technology","VLSI-SoC: Technology Advancement on SoC Design"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-031-16818-5_7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,9,28]],"date-time":"2022-09-28T07:14:48Z","timestamp":1664349288000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-031-16818-5_7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022]]},"ISBN":["9783031168178","9783031168185"],"references-count":24,"URL":"https:\/\/doi.org\/10.1007\/978-3-031-16818-5_7","relation":{},"ISSN":["1868-4238","1868-422X"],"issn-type":[{"type":"print","value":"1868-4238"},{"type":"electronic","value":"1868-422X"}],"subject":[],"published":{"date-parts":[[2022]]},"assertion":[{"value":"22 September 2022","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"VLSI-SoC","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"IFIP\/IEEE International Conference on Very Large Scale Integration - System on a Chip","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2021","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"4 October 2021","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"8 October 2021","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"29","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"vlsi-soc2021","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/vlsisoc.github.io\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}