{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,12]],"date-time":"2025-08-12T21:53:25Z","timestamp":1755035605095,"version":"3.40.3"},"publisher-location":"Cham","reference-count":34,"publisher":"Springer Nature Switzerland","isbn-type":[{"type":"print","value":"9783031429200"},{"type":"electronic","value":"9783031429217"}],"license":[{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2023,1,1]],"date-time":"2023-01-01T00:00:00Z","timestamp":1672531200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023]]},"DOI":"10.1007\/978-3-031-42921-7_22","type":"book-chapter","created":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T05:02:14Z","timestamp":1694754134000},"page":"322-337","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["An Almost Fully RRAM-Based LUT Design for\u00a0Reconfigurable Circuits"],"prefix":"10.1007","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-0703-9397","authenticated-orcid":false,"given":"Philipp","family":"Grothe","sequence":"first","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7380-5270","authenticated-orcid":false,"given":"Saleh","family":"Mulhem","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1911-756X","authenticated-orcid":false,"given":"Mladen","family":"Berekovic","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2023,9,16]]},"reference":[{"key":"22_CR1","doi-asserted-by":"crossref","unstructured":"Almurib, H.A., et al.: A memristor-based LUT for FPGAs. In: The 9th IEEE International Conference on Nano\/Micro Engineered and Molecular Systems (NEMS), pp. 448\u2013453 (2014)","DOI":"10.1109\/NEMS.2014.6908847"},{"issue":"2","key":"22_CR2","doi-asserted-by":"publisher","first-page":"351","DOI":"10.1007\/s10470-020-01587-z","volume":"106","author":"H Bazzi","year":"2021","unstructured":"Bazzi, H., et al.: RRAM-based non-volatile SRAM cell architectures for ultra-low-power applications. Analog Integr. Circ. Sig. Process 106(2), 351\u2013361 (2021)","journal-title":"Analog Integr. Circ. Sig. Process"},{"key":"22_CR3","unstructured":"Cadence Design System Inc: GPDK045 - 45nm CMOS 11M\/2P generic PDK (2022)"},{"key":"22_CR4","doi-asserted-by":"crossref","unstructured":"Chen, Y.C., et al.: A novel peripheral circuit for RRAM-based LUT. In: 2012 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1811\u20131814 (2012)","DOI":"10.1109\/ISCAS.2012.6271619"},{"issue":"5","key":"22_CR5","doi-asserted-by":"publisher","first-page":"507","DOI":"10.1109\/TCT.1971.1083337","volume":"18","author":"L Chua","year":"1971","unstructured":"Chua, L.: Memristor-the missing circuit element. IEEE Trans. Circ. Theory 18(5), 507\u2013519 (1971)","journal-title":"IEEE Trans. Circ. Theory"},{"key":"22_CR6","doi-asserted-by":"crossref","unstructured":"Cong, J., Xiao, B.: MRFPGA: a novel FPGA architecture with memristor-based reconfiguration. In: 2011 IEEE\/ACM International Symposium on Nanoscale Architectures, pp. 1\u20138 (2011)","DOI":"10.1109\/NANOARCH.2011.5941476"},{"key":"22_CR7","doi-asserted-by":"crossref","unstructured":"Cong, J., Xiao, B.: FPGA-RPI: a novel FPGA architecture with RRAM-based programmable interconnects. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 22(4), 864\u2013877 (2014)","DOI":"10.1109\/TVLSI.2013.2259512"},{"key":"22_CR8","doi-asserted-by":"crossref","unstructured":"De Nil, M., et al.: Ultra low power ASIP design for wireless sensor nodes. In: 2007 14th IEEE International Conference on Electronics, Circuits and Systems, pp. 1352\u20131355. IEEE (2007)","DOI":"10.1109\/ICECS.2007.4511249"},{"key":"22_CR9","doi-asserted-by":"crossref","unstructured":"Gaillardon, P.E., et al.: GMS: generic memristive structure for non-volatile FPGAS. In: 2012 IEEE\/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), pp. 94\u201398. IEEE (2012)","DOI":"10.1109\/VLSI-SoC.2012.6379012"},{"key":"22_CR10","doi-asserted-by":"publisher","first-page":"68","DOI":"10.1109\/TNANO.2018.2881109","volume":"18","author":"E Giacomin","year":"2018","unstructured":"Giacomin, E., Gaillardon, P.E.: A resistive random access memory Addon for the NCSU FreePDK 45 nm. IEEE Trans. Nanotechnol. 18, 68\u201372 (2018)","journal-title":"IEEE Trans. Nanotechnol."},{"issue":"10","key":"22_CR11","doi-asserted-by":"publisher","first-page":"1405","DOI":"10.1109\/LED.2012.2210856","volume":"33","author":"X Guan","year":"2012","unstructured":"Guan, X., et al.: A spice compact model of metal oxide resistive switching memory with variations. IEEE Electron Device Lett. 33(10), 1405\u20131407 (2012)","journal-title":"IEEE Electron Device Lett."},{"issue":"12","key":"22_CR12","doi-asserted-by":"publisher","first-page":"2144","DOI":"10.1109\/TCAD.2017.2681079","volume":"36","author":"Y Guo","year":"2017","unstructured":"Guo, Y., et al.: A compact memristor-CMOS hybrid look-up-table design and potential application in FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(12), 2144\u20132148 (2017)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circuits Syst."},{"issue":"09","key":"22_CR13","doi-asserted-by":"publisher","first-page":"609","DOI":"10.1109\/TC.1979.1675428","volume":"28","author":"Y Kambayashi","year":"1979","unstructured":"Kambayashi, Y.: Logic design of programmable logic arrays. IEEE Trans. Comput. 28(09), 609\u2013617 (1979)","journal-title":"IEEE Trans. Comput."},{"issue":"1","key":"22_CR14","doi-asserted-by":"publisher","first-page":"389","DOI":"10.1021\/nl203687n","volume":"12","author":"KH Kim","year":"2012","unstructured":"Kim, K.H., et al.: A functional hybrid memristor crossbar-array\/CMOS system for data storage and neuromorphic applications. Nano Lett. 12(1), 389\u2013395 (2012)","journal-title":"Nano Lett."},{"key":"22_CR15","doi-asserted-by":"crossref","unstructured":"Kumar, T.N., et al.: A novel design of a memristor-based look-up table (LUT) for FPGA. In: 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 703\u2013706 (2014)","DOI":"10.1109\/APCCAS.2014.7032878"},{"key":"22_CR16","doi-asserted-by":"crossref","unstructured":"Kvatinsky, S., et al.: Memristor-based material implication (IMPLY) logic: design principles and methodologies. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 22(10), 2054\u20132066 (2013)","DOI":"10.1109\/TVLSI.2013.2282132"},{"issue":"11","key":"22_CR17","first-page":"895","volume":"61","author":"S Kvatinsky","year":"2014","unstructured":"Kvatinsky, S., et al.: Magic-memristor-aided logic. IEEE Trans. Circuits Syst. II Express Briefs 61(11), 895\u2013899 (2014)","journal-title":"IEEE Trans. Circuits Syst. II Express Briefs"},{"key":"22_CR18","doi-asserted-by":"crossref","unstructured":"Lin, W.P., et al.: A nonvolatile look-up table using ReRAM for reconfigurable logic. In: 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 133\u2013136. IEEE (2014)","DOI":"10.1109\/ASSCC.2014.7008878"},{"issue":"2","key":"22_CR19","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1145\/3365837","volume":"16","author":"HAD Nguyen","year":"2020","unstructured":"Nguyen, H.A.D., et al.: A classification of memory-centric computing. ACM J. Emerg. Technol. Comput. Syst. (JETC) 16(2), 1\u201326 (2020)","journal-title":"ACM J. Emerg. Technol. Comput. Syst. (JETC)"},{"key":"22_CR20","doi-asserted-by":"crossref","unstructured":"Ochi, H., et al.: Via-switch FPGA: highly dense mixed-grained reconfigurable architecture with overlay via-switch crossbars. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 26(12), 2723\u20132736 (2018)","DOI":"10.1109\/TVLSI.2018.2812914"},{"issue":"21","key":"22_CR21","doi-asserted-by":"publisher","first-page":"2929","DOI":"10.1002\/adma.201104669","volume":"24","author":"L Pellegrino","year":"2012","unstructured":"Pellegrino, L., et al.: Multistate memory devices based on free-standing VO2\/TIO2 microstructures driven by joule self-heating. Adv. Mater. 24(21), 2929\u20132934 (2012)","journal-title":"Adv. Mater."},{"key":"22_CR22","doi-asserted-by":"publisher","first-page":"91564","DOI":"10.1109\/ACCESS.2021.3092167","volume":"9","author":"S Rai","year":"2021","unstructured":"Rai, S., et al.: A survey of FPGA logic cell designs in the light of emerging technologies. IEEE Access 9, 91564\u201391574 (2021)","journal-title":"IEEE Access"},{"key":"22_CR23","doi-asserted-by":"crossref","unstructured":"Sampath, M., et al.: Hybrid CMOS-memristor based FPGA architecture. In: 2015 International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI-SATA), pp. 1\u20136 (2015)","DOI":"10.1109\/VLSI-SATA.2015.7050461"},{"issue":"7191","key":"22_CR24","doi-asserted-by":"publisher","first-page":"80","DOI":"10.1038\/nature06932","volume":"453","author":"DB Strukov","year":"2008","unstructured":"Strukov, D.B., et al.: The missing memristor found. Nature 453(7191), 80\u201383 (2008)","journal-title":"Nature"},{"key":"22_CR25","doi-asserted-by":"crossref","unstructured":"Tang, X., et al.: A high-performance low-power near-VT RRAM-based FPGA. In: 2014 International Conference on Field-Programmable Technology (FPT), pp. 207\u2013214 (2014)","DOI":"10.1109\/FPT.2014.7082777"},{"issue":"5","key":"22_CR26","doi-asserted-by":"publisher","first-page":"1173","DOI":"10.1109\/TCSI.2016.2638542","volume":"64","author":"X Tang","year":"2017","unstructured":"Tang, X., et al.: Circuit designs of high-performance and low-power RRAM-based multiplexers based on 4T(ransistor)1R(RAM) programming structure. IEEE Trans. Circuits Syst. I Regul. Pap. 64(5), 1173\u20131186 (2017)","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"issue":"3","key":"22_CR27","doi-asserted-by":"publisher","first-page":"639","DOI":"10.1109\/JETCAS.2018.2847600","volume":"8","author":"X Tang","year":"2018","unstructured":"Tang, X., et al.: Post-P &R performance and power analysis for RRAM-based FPGAS. IEEE J. Emerg. Sel. Topics Circ. Syst. 8(3), 639\u2013650 (2018)","journal-title":"IEEE J. Emerg. Sel. Topics Circ. Syst."},{"key":"22_CR28","doi-asserted-by":"crossref","unstructured":"Tang, X., et al.: A RRAM-based FPGA for energy-efficient edge computing. In: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 144-a-144-f (2020)","DOI":"10.23919\/DATE48585.2020.9116478"},{"key":"22_CR29","doi-asserted-by":"crossref","unstructured":"Tsekoura, I., et al.: An evaluation of energy efficient microcontrollers. In: 2014 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), pp. 1\u20135. IEEE (2014)","DOI":"10.1109\/ReCoSoC.2014.6861368"},{"key":"22_CR30","doi-asserted-by":"crossref","unstructured":"Xie, L., et al.: Non-volatile look-up table based FPGA implementations. In: 2016 11th International Design & Test Symposium (IDT), pp. 165\u2013170. IEEE (2016)","DOI":"10.1109\/IDT.2016.7843034"},{"issue":"6","key":"22_CR31","doi-asserted-by":"publisher","first-page":"818","DOI":"10.1109\/TCSI.2016.2538039","volume":"63","author":"J Xing","year":"2016","unstructured":"Xing, J., Serb, A., Khiat, A., Berdan, R., Xu, H., Prodromakis, T.: An FPGA-based instrument for EN-Masse RRAM characterization with ns pulsing resolution. IEEE Trans. Circuits Syst. I Regul. Pap. 63(6), 818\u2013826 (2016)","journal-title":"IEEE Trans. Circuits Syst. I Regul. Pap."},{"key":"22_CR32","unstructured":"Xu, C., et al.: Design implications of memristor-based RRAM cross-point structures. In: 2011 Design, Automation & Test in Europe, pp. 1\u20136. IEEE (2011)"},{"issue":"1","key":"22_CR33","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1186\/s11671-020-03299-9","volume":"15","author":"F Zahoor","year":"2020","unstructured":"Zahoor, F., et al.: Resistive random access memory (RRAM): an overview of materials, switching mechanism, performance, multilevel cell (MLC) storage, modeling, and applications. Nanoscale Res. Lett. 15(1), 1\u201326 (2020)","journal-title":"Nanoscale Res. Lett."},{"key":"22_CR34","doi-asserted-by":"crossref","unstructured":"Zhou, Y.X., et al.: Nonvolatile reconfigurable sequential logic in a HFO 2 resistive random access memory array. Nanoscale 9(20) (2017)","DOI":"10.1039\/C7NR00934H"}],"container-title":["Lecture Notes in Computer Science","Applied Reconfigurable Computing. Architectures, Tools, and Applications"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-031-42921-7_22","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,9,15]],"date-time":"2023-09-15T05:04:48Z","timestamp":1694754288000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-031-42921-7_22"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023]]},"ISBN":["9783031429200","9783031429217"],"references-count":34,"URL":"https:\/\/doi.org\/10.1007\/978-3-031-42921-7_22","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2023]]},"assertion":[{"value":"16 September 2023","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ARC","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Symposium on Applied Reconfigurable Computing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Cottbus","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Germany","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2023","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"27 September 2023","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"29 September 2023","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"19","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"arc2023","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/arc2023.org\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}