{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,28]],"date-time":"2025-03-28T04:05:47Z","timestamp":1743134747063,"version":"3.40.3"},"publisher-location":"Cham","reference-count":26,"publisher":"Springer Nature Switzerland","isbn-type":[{"type":"print","value":"9783031686054"},{"type":"electronic","value":"9783031686061"}],"license":[{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2024,1,1]],"date-time":"2024-01-01T00:00:00Z","timestamp":1704067200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024]]},"DOI":"10.1007\/978-3-031-68606-1_11","type":"book-chapter","created":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T23:02:40Z","timestamp":1725836560000},"page":"169-183","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["TitanSSL: Towards Accelerating OpenSSL in\u00a0a\u00a0Full RISC-V Architecture Using OpenTitan Root-of-Trust"],"prefix":"10.1007","author":[{"given":"Alberto","family":"Musa","sequence":"first","affiliation":[]},{"given":"Franco","family":"Volante","sequence":"additional","affiliation":[]},{"given":"Emanuele","family":"Parisi","sequence":"additional","affiliation":[]},{"given":"Luca","family":"Barbierato","sequence":"additional","affiliation":[]},{"given":"Edoardo","family":"Patti","sequence":"additional","affiliation":[]},{"given":"Andrea","family":"Bartolini","sequence":"additional","affiliation":[]},{"given":"Andrea","family":"Acquaviva","sequence":"additional","affiliation":[]},{"given":"Francesco","family":"Barchi","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2024,9,9]]},"reference":[{"key":"11_CR1","doi-asserted-by":"crossref","unstructured":"Andrade, G., Lee, D., Kohlbrenner, D., Asanovic, K., Song, D.: Software-Based Off-Chip Memory Protection for RISC-V Trusted Execution Environments. UC Berkeley (2020)","DOI":"10.1109\/MSEC.2020.2990649"},{"key":"11_CR2","unstructured":"Bach-Nutman, M.: Understanding the top 10 owasp vulnerabilities. arXiv preprint arXiv:2012.09960 (2020)"},{"key":"11_CR3","unstructured":"Cheang, K., Rasmussen, C., Lee, D., Kohlbrenner, D.W., Asanovi\u0107, K., Seshia, S.A.: Verifying risc-v physical memory protection (2022)"},{"key":"11_CR4","doi-asserted-by":"publisher","unstructured":"Ciani, M., et al.: Cyber security aboard micro aerial vehicles: an opentitan-based visual communication use case. In: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), pp.\u00a01\u20135 (2023). https:\/\/doi.org\/10.1109\/ISCAS46773.2023.10181732","DOI":"10.1109\/ISCAS46773.2023.10181732"},{"key":"11_CR5","unstructured":"lowRISC CIC. Opentitan official documentation (2019). https:\/\/opentitan.org\/book\/doc\/introduction.html"},{"key":"11_CR6","unstructured":"Costan, V., Devadas, S.: Intel sgx explained. Cryptology ePrint Archive, Paper 2016\/086 (2016). https:\/\/eprint.iacr.org\/2016\/086"},{"key":"11_CR7","doi-asserted-by":"publisher","unstructured":"Davide\u00a0Schiavone, P., et al.: Slow and steady wins the race? a comparison of ultra-low-power RISC-V cores for internet-of-things applications. In: 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp.\u00a01\u20138 (2017). https:\/\/doi.org\/10.1109\/PATMOS.2017.8106976","DOI":"10.1109\/PATMOS.2017.8106976"},{"key":"11_CR8","unstructured":"Enumeration, C.W.: 2022 CWE top 25 most dangerous software weaknesses (2022). https:\/\/cwe.mitre.org\/top25\/archive\/2022\/2022_cwe_top25.html"},{"key":"11_CR9","doi-asserted-by":"publisher","unstructured":"Fadiheh, M.R., Stoffel, D., Barrett, C., Mitra, S., Kunz, W.: Processor hardware security vulnerabilities and their detection by unique program execution checking. In: 2019 Design, Automation and Test in Europe Conference and Exhibition, 2019, pp. 994\u2013999 (2019). https:\/\/doi.org\/10.23919\/DATE.2019.8715004","DOI":"10.23919\/DATE.2019.8715004"},{"key":"11_CR10","unstructured":"Foundation, O.S.: Source code for the openssl software (1998). https:\/\/github.com\/openssl\/openssl"},{"key":"11_CR11","doi-asserted-by":"publisher","unstructured":"Gautschi, M., et al.: Near-threshold RISC-V core with DSP extensions for scalable IOT endpoint devices. IEEE Trans. Very Large Scale Integr. Syst. 25(10), 2700\u20132713 (2017). https:\/\/doi.org\/10.1109\/TVLSI.2017.2654506","DOI":"10.1109\/TVLSI.2017.2654506"},{"key":"11_CR12","unstructured":"Group, G.P.: Global platform client API documentation (2023). https:\/\/optee.readthedocs.io\/en\/stable\/architecture\/globalplatform_api.html#tee-client-api"},{"key":"11_CR13","unstructured":"Group, G.P.: Global platform official website (2023). https:\/\/globalplatform.org\/"},{"key":"11_CR14","doi-asserted-by":"publisher","unstructured":"Joannou, A., et al.: Efficient tagged memory. In: 2017 IEEE International Conference on Computer Design (ICCD), pp. 641\u2013648 (2017). https:\/\/doi.org\/10.1109\/ICCD.2017.112","DOI":"10.1109\/ICCD.2017.112"},{"key":"11_CR15","unstructured":"Johnson, S., Rizzo, D., Ranganathan, P., McCune, J., Ho, R.: Titan: enabling a transparent silicon root of trust for cloud. In: Hot Chips: A Symposium on High Performance Chips, vol.\u00a0194 (2018)"},{"key":"11_CR16","doi-asserted-by":"publisher","unstructured":"Lee, D., Kohlbrenner, D., Shinde, S., Asanovi\u0107, K., Song, D.: Keystone: an open framework for architecting trusted execution environments. In: Proceedings of the Fifteenth European Conference on Computer Systems (EuroSys 2020). Association for Computing Machinery, New York (2020).https:\/\/doi.org\/10.1145\/3342195.3387532","DOI":"10.1145\/3342195.3387532"},{"key":"11_CR17","doi-asserted-by":"crossref","unstructured":"Lee, D., Kohlbrenner, D., Shinde, S., Song, D., Asanovi\u0107, K.: Keystone: an open framework for architecting tees (2019)","DOI":"10.1145\/3342195.3387532"},{"key":"11_CR18","unstructured":"Lu, T.: A survey on RISC-V security: hardware and architecture (2021)"},{"key":"11_CR19","doi-asserted-by":"crossref","unstructured":"Nasahl, P., Mangard, S.: Scramble-cfi: mitigating fault-induced control-flow attacks on opentitan (2023)","DOI":"10.1145\/3583781.3590221"},{"key":"11_CR20","unstructured":"NXP. Edgelock secure enclave (2019). https:\/\/www.nxp.com\/products\/nxp-product-information\/nxp-product-programs\/edgelock-secure-enclave:EDGELOCK-SECURE-ENCLAVE"},{"key":"11_CR21","doi-asserted-by":"publisher","unstructured":"Parno, B., McCune, J.M., Perrig, A.: Roots of Trust, pp. 35\u201340. Springer, New York (2011). https:\/\/doi.org\/10.1007\/978-1-4614-1460-5_6","DOI":"10.1007\/978-1-4614-1460-5_6"},{"key":"11_CR22","doi-asserted-by":"publisher","unstructured":"Pinto, S., Santos, N.: Demystifying arm trustzone: a comprehensive survey. ACM Comput. Surv. 51(6) (2020). https:\/\/doi.org\/10.1145\/3291047","DOI":"10.1145\/3291047"},{"issue":"1","key":"11_CR23","doi-asserted-by":"publisher","first-page":"15","DOI":"10.1016\/S1353-4858(09)70008-X","volume":"2009","author":"B Potter","year":"2009","unstructured":"Potter, B.: Microsoft SDL threat modelling tool. Netw. Secur. 2009(1), 15\u201318 (2009)","journal-title":"Netw. Secur."},{"key":"11_CR24","unstructured":"Schrammel, D., et al.: Donky: domain keys\u2013efficient in-process isolation for RISC-V and x86. In: Proceedings of the 29th USENIX Conference on Security Symposium, pp. 1677\u20131694 (2020)"},{"key":"11_CR25","unstructured":"Weiser, S., Werner, M., Brasser, F., Malenko, M., Mangard, S., Sadeghi, A.R.: Timber-v: tag-isolated memory bringing fine-grained enclaves to risc-v"},{"key":"11_CR26","doi-asserted-by":"publisher","unstructured":"Zaruba, F., Benini, L.: The cost of application-class processing: energy and performance analysis of a Linux-ready 1.7-GHZ 64-bit RISC-V core in 22-nm FDSOI technology. IEEE Trans. Very Large Scale Integrat. Syst. 27(11), 2629\u20132640 (2019). https:\/\/doi.org\/10.1109\/TVLSI.2019.2926114","DOI":"10.1109\/TVLSI.2019.2926114"}],"container-title":["Lecture Notes in Computer Science","Computer Safety, Reliability, and Security"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-031-68606-1_11","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T23:04:28Z","timestamp":1725836668000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-031-68606-1_11"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024]]},"ISBN":["9783031686054","9783031686061"],"references-count":26,"URL":"https:\/\/doi.org\/10.1007\/978-3-031-68606-1_11","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2024]]},"assertion":[{"value":"9 September 2024","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"SAFECOMP","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Computer Safety, Reliability, and Security","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Florence","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Italy","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2024","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"17 September 2024","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"20 September 2024","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"43","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"safecomp2024","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/www.safecomp2024.unifi.it\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}