{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,25]],"date-time":"2025-03-25T19:13:25Z","timestamp":1742930005560,"version":"3.40.3"},"publisher-location":"Cham","reference-count":20,"publisher":"Springer Nature Switzerland","isbn-type":[{"type":"print","value":"9783031783791"},{"type":"electronic","value":"9783031783807"}],"license":[{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2025,1,1]],"date-time":"2025-01-01T00:00:00Z","timestamp":1735689600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025]]},"DOI":"10.1007\/978-3-031-78380-7_6","type":"book-chapter","created":{"date-parts":[[2025,1,27]],"date-time":"2025-01-27T15:50:37Z","timestamp":1737993037000},"page":"72-84","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["A Novel System Simulation Framework for\u00a0HBM2 FPGA Platforms"],"prefix":"10.1007","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0891-235X","authenticated-orcid":false,"given":"Hector Gerardo","family":"Mu\u00f1oz Hernandez","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9420-5450","authenticated-orcid":false,"given":"Veronia","family":"Iskandar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2677-6475","authenticated-orcid":false,"given":"Lukas","family":"Steiner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2912-0650","authenticated-orcid":false,"given":"Philipp","family":"Holzinger","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0036-2143","authenticated-orcid":false,"given":"Matthias","family":"Jung","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2571-8441","authenticated-orcid":false,"given":"Diana","family":"G\u00f6hringer","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1790-3869","authenticated-orcid":false,"given":"Michael","family":"H\u00fcbner","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9010-086X","authenticated-orcid":false,"given":"Norbert","family":"Wehn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9687-6247","authenticated-orcid":false,"given":"Marc","family":"Reichenbach","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2025,1,28]]},"reference":[{"key":"6_CR1","unstructured":"Akram, A., Babaie, M., Wlsasser, W., Lowe-Power, J.: Modeling HBM2 Memory Controller. In: gem5 Users\u2019 Workshop ISCA 2022 (2022)"},{"key":"6_CR2","unstructured":"AMD \/ Xilinx. Alveo U55C High Performance Compute Card (2023). https:\/\/www.xilinx.com\/products\/boards-and-kits\/alveo\/u55c.html"},{"key":"6_CR3","unstructured":"AMD-Xilinx. HACC cluster 2024. https:\/\/xilinx-center.csl.illinois.edu\/xacc-cluster\/"},{"key":"6_CR4","doi-asserted-by":"crossref","unstructured":"Binkert, N., et al.: The Gem5 simulator. SIGARCH 39, 1-7 (2011) issn: 0163-5964","DOI":"10.1145\/2024716.2024718"},{"key":"6_CR5","doi-asserted-by":"crossref","unstructured":"Choi, Y.-k., Chi, Y., Qiao, W., Samardzic, N., Cong, J.: HBM Connect: High-Performance HLS Interconnect for FPGA HBM in ACM\/SIGDA, New York, USA, pp. 116-126 (Feb. 2021) (2022). isbn: 978-1-4503-8218-2","DOI":"10.1145\/3431920.3439301"},{"key":"6_CR6","doi-asserted-by":"publisher","unstructured":"Ghose, S., Li, T., Hajinazar, N., Cali, D.S,. Mutlu, O.: Demystifying complex workload-dram interactions: an experimental study. Proc. ACM 3 (Dec 2019). https:\/\/doi.org\/10.1145\/3366708","DOI":"10.1145\/3366708"},{"key":"6_CR7","doi-asserted-by":"crossref","unstructured":"Holzinger, P., Reiser, D., Hahn, T., Reichenbach, M.: Fast HBM Access with FPGAs: Analysis, Architectures, and Applications in IEEE (IPDPSW), Portland, OR, USA, June 2021, pp. 152-159 (2022). isbn: 978-1-66543-577-2","DOI":"10.1109\/IPDPSW52791.2021.00030"},{"key":"6_CR8","unstructured":"IEEE Standard for Standard SystemC Language Reference Manual. IEEE Std 1666-2011 (Revision of IEEE Std 1666-2005), 1-638 (2012)"},{"key":"6_CR9","doi-asserted-by":"crossref","unstructured":"Iskandar, V., Abd El Ghany, M. A., Goehringer, D.: NDP-RANK: prediction and ranking of ndp systems performance using machine learning. Microprocess. Microsyst. 96, 104707 (2023), issn: 0141-9331","DOI":"10.1016\/j.micpro.2022.104707"},{"key":"6_CR10","doi-asserted-by":"crossref","unstructured":"Jain, A.K., et al.: Modular and Lean Architecture with Elasticity for Sparse Matrix Vector Multiplication on FPGAs in FCCM, pp. 133-143 (2023)","DOI":"10.1109\/FCCM57271.2023.00023"},{"key":"6_CR11","unstructured":"Jun, H., et al.: HBM (high bandwidth memory) DRAM technology and architecture en. In: 2017 IEEE (IMW), pp. 1-4. IEEE, Monterey, CA, USA (May 2017), isbn: 978-1-5090-3274-7 (2022)"},{"key":"6_CR12","first-page":"63","volume":"8","author":"M Jung","year":"2015","unstructured":"Jung, M., Weis, C., Wehn, N.: DRAMSys: a flexible DRAM subsystem design space exploration framework. IPSJ Trans. 8, 63\u201374 (2015)","journal-title":"IPSJ Trans."},{"key":"6_CR13","doi-asserted-by":"crossref","unstructured":"Kara, K., Hagleitner, C., Diamantopoulos, D., Syrivelis, D., Alonso, G.: High Bandwidth Memory on FPGAs: A Data Analytics Perspective in FPL, pp. 1\u20138 (Aug 2020), ISSN: 1946\u20131488","DOI":"10.1109\/FPL50879.2020.00013"},{"key":"6_CR14","doi-asserted-by":"publisher","unstructured":"Kn\u00f6dtel, J. et al.: TAPRE-HBM: Trace-based processor rapid emulation using HBM on FPGAs. In: Palumbo, F., Keramidas, G., Voros, N., Diniz, P.C. (eds.) Applied Reconfigurable Computing. Architectures, Tools, and Applications. ARC 2023. LNCS, vol. 14251. Springer, Cham (2023). https:\/\/doi.org\/10.1007\/978-3-031-42921-7_21","DOI":"10.1007\/978-3-031-42921-7_21"},{"key":"6_CR15","doi-asserted-by":"crossref","unstructured":"Li, S., Yang, Z., Reddy, D., Srivastava, A., Jacob, B.: DRAMsim3: a cycle-accurate, thermal-capable DRAM simulator. IEEE Comput. Architect. Lett. 19, 106\u2013109 (2020), ISSN: 1556-6064","DOI":"10.1109\/LCA.2020.2973991"},{"key":"6_CR16","doi-asserted-by":"publisher","first-page":"112","DOI":"10.1109\/LCA.2023.3333759","volume":"23","author":"H Luo","year":"2023","unstructured":"Luo, H., et al.: Ramulator 2.0: a modern, modular, and extensible DRAM simulator. IEEE Comput. Architect. Lett. 23, 112\u2013116 (2023)","journal-title":"IEEE Comput. Architect. Lett."},{"key":"6_CR17","unstructured":"Pedoeem, J., Huang, R.: YOLO-LITE: A Real-Time Object Detection Algorithm Optimized for Non-GPU Computers. CoRR. arXiv: 1811.05588 (2018)"},{"key":"6_CR18","doi-asserted-by":"crossref","unstructured":"Singh, G. et al.: NAPEL: Near-Memory Computing Application Performance Prediction via Ensemble Learning in 56th ACM\/IEEE (DAC), pp. 1-6 (2019),","DOI":"10.1145\/3316781.3317867"},{"key":"6_CR19","doi-asserted-by":"crossref","unstructured":"Song, L. et al.: Sextans: A Streaming Accelerator for General-Purpose Sparse- Matrix Dense-Matrix Multiplication in the 2022 ACM\/SIGDA (2022)","DOI":"10.1145\/3490422.3502357"},{"key":"6_CR20","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"110","DOI":"10.1007\/978-3-030-60939-9_8","volume-title":"Embedded Computer Systems: Architectures, Modeling, and Simulation","author":"L Steiner","year":"2020","unstructured":"Steiner, L., Jung, M., Prado, F.S., Bykov, K., Wehn, N.: DRAMSys4.0: A Fast and Cycle-Accurate SystemC\/TLM-Based DRAM simulator. In: Orailoglu, A., Jung, M., Reichenbach, M. (eds.) SAMOS 2020. LNCS, vol. 12471, pp. 110\u2013126. Springer, Cham (2020). https:\/\/doi.org\/10.1007\/978-3-030-60939-9_8"}],"container-title":["Lecture Notes in Computer Science","Embedded Computer Systems: Architectures, Modeling, and Simulation"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-031-78380-7_6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,1,27]],"date-time":"2025-01-27T15:50:44Z","timestamp":1737993044000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-031-78380-7_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025]]},"ISBN":["9783031783791","9783031783807"],"references-count":20,"URL":"https:\/\/doi.org\/10.1007\/978-3-031-78380-7_6","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2025]]},"assertion":[{"value":"28 January 2025","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"SAMOS","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Samos","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Greece","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2024","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"30 June 2024","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"5 July 2024","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"24","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"samos2024","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/samos-conference.com\/wp\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}