{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,23]],"date-time":"2025-11-23T18:22:30Z","timestamp":1763922150000,"version":"3.45.0"},"publisher-location":"Cham","reference-count":19,"publisher":"Springer Nature Switzerland","isbn-type":[{"value":"9783032076113","type":"print"},{"value":"9783032076120","type":"electronic"}],"license":[{"start":{"date-parts":[[2025,11,24]],"date-time":"2025-11-24T00:00:00Z","timestamp":1763942400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2025,11,24]],"date-time":"2025-11-24T00:00:00Z","timestamp":1763942400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026]]},"DOI":"10.1007\/978-3-032-07612-0_40","type":"book-chapter","created":{"date-parts":[[2025,11,23]],"date-time":"2025-11-23T17:57:33Z","timestamp":1763920653000},"page":"521-533","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Evaluating RISC-V Processor as\u00a0an\u00a0Alternative for\u00a0High Performance Computing"],"prefix":"10.1007","author":[{"given":"Aniket P.","family":"Garade","sequence":"first","affiliation":[]},{"given":"Ashish","family":"Bisht","sequence":"additional","affiliation":[]},{"given":"H. V.","family":"Deepika","sequence":"additional","affiliation":[]},{"given":"P.","family":"Haribabu","sequence":"additional","affiliation":[]},{"given":"S. A.","family":"Kumar","sequence":"additional","affiliation":[]},{"given":"S. D.","family":"Sudarsan","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2025,11,24]]},"reference":[{"key":"40_CR1","unstructured":"TOP500. TOP500: The List of the World s Most Powerful Computers. https:\/\/top500.org\/. Accessed 12 Mar 2025"},{"key":"40_CR2","doi-asserted-by":"crossref","unstructured":"Blem, E., Menon, J., Sankaralingam, K.: Power struggles: revisiting the RISC vs. CISC debate on contemporary ARM and x86 architectures. In: 2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA), pp. 1\u201312. IEEE (2013)","DOI":"10.1109\/HPCA.2013.6522302"},{"key":"40_CR3","doi-asserted-by":"crossref","unstructured":"Jackson, A., et al.: Evaluating the arm ecosystem for high performance computing. In: Proceedings of the Platform for Advanced Scientific Computing Conference, pp. 1\u201311 (2019)","DOI":"10.1145\/3324989.3325722"},{"key":"40_CR4","doi-asserted-by":"crossref","unstructured":"Ouro, P., Lopez-Novoa, U., Guest, M.F.: On the performance of a highly-scalable Computational Fluid Dynamics code on AMD, ARM and Intel processor-based HPC systems. Comput. Phys. Commun. 269, 108105 (2021)","DOI":"10.1016\/j.cpc.2021.108105"},{"key":"40_CR5","doi-asserted-by":"crossref","unstructured":"Waterman, A., et al.: The RISC-V instruction set manual, volume I: user-level ISA, version 2.0. Technical report, UCB\/EECS-2014-54, p. 4, EECS Department, University of California, Berkeley (2014)","DOI":"10.21236\/ADA605735"},{"key":"40_CR6","doi-asserted-by":"crossref","unstructured":"Diehl, P., et al.: Preparing for HPC on RISC-V: examining vectorization and distributed performance of an astrophysics application with HPX and Kokkos. In: SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis, pp. 1656\u20131665. IEEE (2024)","DOI":"10.1109\/SCW63240.2024.00207"},{"key":"40_CR7","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"526","DOI":"10.1007\/978-3-031-40843-4_39","volume-title":"High Performance Computing - ISC High Performance 2023","author":"F Mantovani","year":"2023","unstructured":"Mantovani, F., et al.: Software development vehicles to enable extended and early co-design: a RISC-V and HPC case of study. In: Bienz, A., Weiland, M., Baboulin, M., Kruse, C. (eds.) ISC High Performance 2023. LNCS, vol. 13999, pp. 526\u2013537. Springer, Cham (2023). https:\/\/doi.org\/10.1007\/978-3-031-40843-4_39"},{"key":"40_CR8","doi-asserted-by":"crossref","unstructured":"Perez, B., Fell, A., Davis, J.D.: Coyote: an open source simulation tool to enable RISC-V in HPC. In: 2021 Design, Automation and Test in Europe Conference and Exhibition (DATE), pp. 130\u2013135. IEEE (2021)","DOI":"10.23919\/DATE51398.2021.9474080"},{"key":"40_CR9","unstructured":"Semico Research & Consulting Group: RISC-V Market Analysis: The New Kid on the Block (2019). https:\/\/semico.com\/content\/risc-v-market-analysis-new-kid-block"},{"key":"40_CR10","unstructured":"Asanovic, K., et al.: The landscape of parallel computing research: a view from Berkeley (2006)"},{"key":"40_CR11","doi-asserted-by":"crossref","unstructured":"Brown, N., et al.: Is RISC-V ready for HPC prime-time: Evaluating the 64-core Sophon SG2042 RISC-V CPU. In: Proceedings of the SC 23 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis, pp. 1566\u20131574 (2023)","DOI":"10.1145\/3624062.3624234"},{"key":"40_CR12","doi-asserted-by":"crossref","unstructured":"Fibich, C., et al.: Evaluation of open-source linear algebra libraries targeting arm and RISC-V architectures. In: 2020 15th Conference on Computer Science and Information Systems (FedCSIS), pp. 663\u2013672. IEEE (2020)","DOI":"10.15439\/2020F145"},{"key":"40_CR13","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"354","DOI":"10.1007\/978-3-031-73716-9_25","volume-title":"High Performance Computing, ISC High Performance 2024 International Workshops - ISC High Performance 2023","author":"N Brown","year":"2025","unstructured":"Brown, N., Jamieson, M.: Performance characterisation of the 64-core SG2042 RISC-V CPU for HPC. In: Weiland, M., Neuwirth, S., Kruse, C., Weinzierl, T. (eds.) ISC High Performance 2023. LNCS, vol. 15058, pp. 354\u2013367. Springer, Cham (2025). https:\/\/doi.org\/10.1007\/978-3-031-73716-9_25"},{"key":"40_CR14","unstructured":"EPCC: RISC-V Hardware Documentation. https:\/\/riscv.epcc.ed.ac.uk\/documentation\/hardware\/. Accessed 12 Mar 2025"},{"key":"40_CR15","doi-asserted-by":"crossref","unstructured":"Wei, Y., et al.: DGEMM Optimization Oriented to ARM SVE Instruction Set Architecture. In: 2022 IEEE 28th International Conference on Parallel and Distributed Systems (ICPADS), pp. 514\u2013521. IEEE (2023)","DOI":"10.1109\/ICPADS56603.2022.00073"},{"key":"40_CR16","unstructured":"OpenMathLib: OpenBLAS v0.3.29 Release. https:\/\/github.com\/OpenMathLib\/OpenBLAS\/releases\/tag\/v0.3.29. Accessed 12 Mar 2025"},{"key":"40_CR17","doi-asserted-by":"crossref","unstructured":"Zhong, D., et al.: Using arm scalable vector extension to optimize open MPI. In: 2020 20th IEEE\/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGRID), pp. 222\u2013231. IEEE (2020)","DOI":"10.1109\/CCGrid49817.2020.00-71"},{"key":"40_CR18","unstructured":"Hammond, J.: STREAM: A High Performance STREAM Benchmark (2025). https:\/\/github.com\/jeffhammond\/STREAM. Accessed 19 Apr 2025"},{"key":"40_CR19","unstructured":"LVM Project. LLVM. https:\/\/llvm.org\/. Accessed 12 Mar 2025"}],"container-title":["Lecture Notes in Computer Science","High Performance Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-032-07612-0_40","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,11,23]],"date-time":"2025-11-23T17:57:36Z","timestamp":1763920656000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-032-07612-0_40"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,11,24]]},"ISBN":["9783032076113","9783032076120"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/978-3-032-07612-0_40","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2025,11,24]]},"assertion":[{"value":"24 November 2025","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"ISC High Performance","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on High Performance Computing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Hamburg","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Germany","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2025","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"10 June 2025","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"13 June 2025","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"40","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"supercomputing2025","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}