{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T12:58:59Z","timestamp":1770814739278,"version":"3.50.1"},"publisher-location":"Cham","reference-count":44,"publisher":"Springer Nature Switzerland","isbn-type":[{"value":"9783032163417","type":"print"},{"value":"9783032163424","type":"electronic"}],"license":[{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2026,1,1]],"date-time":"2026-01-01T00:00:00Z","timestamp":1767225600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2026]]},"DOI":"10.1007\/978-3-032-16342-4_12","type":"book-chapter","created":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T08:57:40Z","timestamp":1770800260000},"page":"206-226","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Addressing Cache Side-Channel Attacks Using Taint-Guided Fine-Grained Computation Offloading in\u00a0Near-Memory Processing"],"prefix":"10.1007","author":[{"given":"Simran Preet","family":"Kaur","sequence":"first","affiliation":[]},{"given":"Asutosh Kumar","family":"Sarma","sequence":"additional","affiliation":[]},{"given":"Satanu","family":"Maity","sequence":"additional","affiliation":[]},{"given":"Manojit","family":"Ghose","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2026,2,12]]},"reference":[{"key":"12_CR1","doi-asserted-by":"crossref","unstructured":"Bhatla, A., Navneet, Panda, B.: The maya cache: a storage-efficient and secure fully-associative last-level cache. In: ISCA 2024, pp. 32\u201344. IEEE Press (2025)","DOI":"10.1109\/ISCA59077.2024.00013"},{"key":"12_CR2","doi-asserted-by":"crossref","unstructured":"Bl\u00f6mer, J., Krummel, V.: Analysis of countermeasures against access driven cache attacks on AES. In: Selected Areas in Cryptography: 14th International Workshop, SAC 2007, Ottawa, Canada, 16\u201317 August 2007, pp. 96\u2013109 (2007)","DOI":"10.1007\/978-3-540-77360-3_7"},{"key":"12_CR3","unstructured":"Brickell, E., Graunke, G., Neve, M., Seifert, J.P.: Software mitigations to hedge AES against cache-based software side channel vulnerabilities. Cryptology ePrint Archive, Paper 2006\/052 (2006)"},{"key":"12_CR4","doi-asserted-by":"crossref","unstructured":"Chakraborty, A., Bhattacharya, S., et\u00a0al.: Are randomized caches truly random? Formal analysis of randomized-partitioned caches. In: IEEE International Symposium on High-Performance Computer Architecture, pp. 233\u2013246 (2023)","DOI":"10.1109\/HPCA56546.2023.10071041"},{"key":"12_CR5","doi-asserted-by":"crossref","unstructured":"Cho, H., Park, J., et\u00a0al.: SmokeBomb: effective mitigation against cache side-channel attacks on the ARM architecture. In: Proceedings of the 18th International Conference on Mobile Systems, Applications, and Services, pp. 107\u2013120 (2020)","DOI":"10.1145\/3386901.3388888"},{"key":"12_CR6","doi-asserted-by":"crossref","unstructured":"Choudhury, A., Nath, K.K., Ghose, M., Thakran, Y.: Memory and CPU utilization-aware energy-efficient VM placement and consolidation in cloud data centers. In: IEEE Guwahati Subsection Conference (GCON), pp.\u00a01\u20136 (2023)","DOI":"10.1109\/GCON58516.2023.10183444"},{"key":"12_CR7","doi-asserted-by":"crossref","unstructured":"Devic, A., Rai, S.B., Sivasubramaniam, A., Akel, A., Eilert, S., Eno, J.: To PIM or not for emerging general purpose processing in DDR memory systems. In: Proceedings of the 49th Annual International Symposium on Computer Architecture, pp. 231\u2013244 (2022)","DOI":"10.1145\/3470496.3527431"},{"key":"12_CR8","doi-asserted-by":"crossref","unstructured":"ElAtali, H., Duan, X., Liljestrand, H., Xu, M., Asokan, N.: BliMe linter. In: 2024 IEEE Secure Development Conference, pp. 46\u201353 (2024)","DOI":"10.1109\/SecDev61143.2024.00011"},{"key":"12_CR9","doi-asserted-by":"crossref","unstructured":"Ferrante, J., Ottenstein, K.J., Warren, J.D.: The program dependence graph and its use in optimization. ACM Trans. Program. Lang. Syst. 319\u2013349 (1987)","DOI":"10.1145\/24039.24041"},{"key":"12_CR10","doi-asserted-by":"crossref","unstructured":"Ghose, M., Kaur, S., Sahu, A.: Scheduling real time tasks in an energy-efficient way using VMs with discrete compute capacities. 102(1), 263\u2013294 (2020)","DOI":"10.1007\/s00607-019-00738-z"},{"key":"12_CR11","doi-asserted-by":"publisher","first-page":"395","DOI":"10.1109\/TCC.2014.2358236","volume":"2","author":"M Godfrey","year":"2014","unstructured":"Godfrey, M., Zulkernine, M.: Preventing cache-based side-channel attacks in a cloud environment. IEEE Trans. Cloud Comput. 2, 395\u2013408 (2014)","journal-title":"IEEE Trans. Cloud Comput."},{"key":"12_CR12","unstructured":"Gruss, D., Lettner, J., Schuster, F., Ohrimenko, O., Haller, I., Costa, M.: Strong and efficient cache Side-Channel protection using hardware transactional memory. In: 26th USENIX Security Symposium, pp. 217\u2013233 (2017)"},{"key":"12_CR13","doi-asserted-by":"crossref","unstructured":"Gullasch, D., Bangerter, E., Krenn, S.: Cache games \u2013 bringing access-based cache attacks on AES to practice. In: 2011 IEEE Symposium on Security and Privacy, pp. 490\u2013505 (2011)","DOI":"10.1109\/SP.2011.22"},{"key":"12_CR14","doi-asserted-by":"crossref","unstructured":"Holtryd, N.R., Manivannan, M., Stenstr\u00f6m, P.: SCALE: secure and scalable cache partitioning. In: IEEE International Symposium on Hardware Oriented Security and Trust, pp. 68\u201379 (2023)","DOI":"10.1109\/HOST55118.2023.10133713"},{"key":"12_CR15","doi-asserted-by":"crossref","unstructured":"Kaur, S., Ghose, M., Sahu, A.: Energy efficient scheduling of real-time tasks in cloud environment. In: IEEE 19th International Conference on High Performance Computing and Communications, pp. 178\u2013185 (2017)","DOI":"10.1109\/HPCC-SmartCity-DSS.2017.23"},{"issue":"1","key":"12_CR16","doi-asserted-by":"publisher","first-page":"45","DOI":"10.1109\/LCA.2015.2414456","volume":"15","author":"Y Kim","year":"2016","unstructured":"Kim, Y., Yang, W., Mutlu, O.: Ramulator: a fast and extensible DRAM simulator. IEEE Comput. Archit. Lett. 15(1), 45\u201349 (2016)","journal-title":"IEEE Comput. Archit. Lett."},{"key":"12_CR17","doi-asserted-by":"crossref","unstructured":"Lattner, C., Adve, V.: LLVM: a compilation framework for lifelong program analysis & transformation. In: International Symposium on Code Generation and Optimization, pp. 75\u201386 (2004)","DOI":"10.1109\/CGO.2004.1281665"},{"key":"12_CR18","doi-asserted-by":"crossref","unstructured":"Lu, Z., Wen, X., Sun, Y.: A game theory based resource sharing scheme in cloud computing environment. In: World Congress on Information and Communication Technologies, pp. 1097\u20131102 (2012)","DOI":"10.1109\/WICT.2012.6409239"},{"key":"12_CR19","doi-asserted-by":"crossref","unstructured":"Luk, C.K., Cohn, R., Muth, R., et\u00a0al.: Pin: building customized program analysis tools with dynamic instrumentation. In: Proceedings of ACM SIGPLAN Conference on Programming Language Design and Implementation, pp. 190\u2013200 (2005)","DOI":"10.1145\/1065010.1065034"},{"issue":"1","key":"12_CR20","doi-asserted-by":"publisher","first-page":"33","DOI":"10.1007\/s41635-017-0025-y","volume":"2","author":"Y Lyu","year":"2017","unstructured":"Lyu, Y., Mishra, P.: A survey of side-channel attacks on caches and countermeasures. J. Hardw. Syst. Secur. 2(1), 33\u201350 (2017). https:\/\/doi.org\/10.1007\/s41635-017-0025-y","journal-title":"J. Hardw. Syst. Secur."},{"key":"12_CR21","doi-asserted-by":"crossref","unstructured":"Mahipal, S., Sharmila, V.C.: Virtual machine security problems and countermeasures for improving quality of service in cloud computing. In: International Conference on Artificial Intelligence and Smart Systems (ICAIS), pp. 1319\u20131324 (2021)","DOI":"10.1109\/ICAIS50930.2021.9395922"},{"key":"12_CR22","doi-asserted-by":"crossref","unstructured":"Maity, S., Ghose, M., Pasricha, S.: A framework for near memory processing with computation offloading and load balancing. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 44(9), 1\u201314 (2025)","DOI":"10.1109\/TCAD.2025.3542361"},{"key":"12_CR23","doi-asserted-by":"crossref","unstructured":"Maity, S., Ghose, M., et\u00a0al.: Unguided machine learning-based computation offloading for near-memory processing. In: 38th VLSID, pp. 540\u2013545 (2025)","DOI":"10.1109\/VLSID64188.2025.00105"},{"key":"12_CR24","doi-asserted-by":"crossref","unstructured":"Maity, S., Goel, M., Ghose, M.: Data locality aware computation offloading in near memory processing architecture for big data applications. In: 2023 IEEE 30th International Conference on HiPC, pp. 288\u2013297 (2023)","DOI":"10.1109\/HiPC58850.2023.00019"},{"key":"12_CR25","doi-asserted-by":"crossref","unstructured":"Moses, J., Iyer, R., Illikkal, R., Srinivasan, S., Aisopos, K.: Shared resource monitoring and throughput optimization in cloud-computing datacenters. In: IEEE International Parallel & Distributed Processing Symposium, pp. 1024\u20131033 (2011)","DOI":"10.1109\/IPDPS.2011.98"},{"key":"12_CR26","doi-asserted-by":"crossref","unstructured":"Nelson, C., Izraelevitz, J., et\u00a0al.: Eliminating micro-architectural side-channel attacks using near memory processing. In: IEEE International Symposium on Secure and Private Execution Environment Design, pp. 179\u2013189 (2022)","DOI":"10.1109\/SEED55351.2022.00023"},{"key":"12_CR27","doi-asserted-by":"crossref","unstructured":"Neve, M., Seifert, J.P.: Advances on access-driven cache attacks on AES. In: International Workshop on Selected Areas in Cryptography, pp. 147\u2013162 (2006)","DOI":"10.1007\/978-3-540-74462-7_11"},{"key":"12_CR28","doi-asserted-by":"crossref","unstructured":"Ojha, D., Dwarkadas, S.: Timecache: using time to eliminate cache side channels when sharing software. In: ACM\/IEEE 48th Annual International Symposium on Computer Architecture, pp. 375\u2013387 (2021)","DOI":"10.1109\/ISCA52012.2021.00037"},{"key":"12_CR29","doi-asserted-by":"crossref","unstructured":"Osvik, D.A., Shamir, A., Tromer, E.: Cache attacks and countermeasures: the case of AES. In: Cryptographers\u2019 Track at the RSA Conference, pp. 1\u201320 (2006)","DOI":"10.1007\/11605805_1"},{"key":"12_CR30","unstructured":"Page, D.: Partitioned cache architecture as a side-channel defence mechanism. Cryptology ePrint Archive, Paper 2005\/280 (2005)"},{"key":"12_CR31","doi-asserted-by":"crossref","unstructured":"Qiang, W., Luo, H.: AutoSlicer: automatic program partitioning for securing sensitive data based-on data dependency analysis and code refactoring. In: 2022 IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom), pp. 239\u2013247 (2022)","DOI":"10.1109\/TrustCom56396.2022.00042"},{"key":"12_CR32","doi-asserted-by":"crossref","unstructured":"Qiu, P., et\u00a0al.: PMU-leaker: performance monitor unit-based realization of cache side-channel attacks. In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (2023)","DOI":"10.1145\/3566097.3567917"},{"key":"12_CR33","doi-asserted-by":"crossref","unstructured":"Qureshi, M.K.: Ceaser: mitigating conflict-based cache attacks via encrypted-address and remapping. In: 2018 51st Annual IEEE\/ACM International Symposium on MICRO, pp. 775\u2013787 (2018)","DOI":"10.1109\/MICRO.2018.00068"},{"key":"12_CR34","doi-asserted-by":"crossref","unstructured":"Sari, S., Demir, O., Kucuk, G.: FairSDP: fair and secure dynamic cache partitioning. In: 4th International Conference on CSE, pp. 469\u2013474 (2019)","DOI":"10.1109\/UBMK.2019.8907000"},{"issue":"3","key":"12_CR35","doi-asserted-by":"publisher","first-page":"141","DOI":"10.1109\/LES.2022.3196499","volume":"15","author":"N Shrivastava","year":"2023","unstructured":"Shrivastava, N., Sarangi, S.R.: Toward an optimal countermeasure for cache side-channel attacks. IEEE Embed. Syst. Lett. 15(3), 141\u2013144 (2023)","journal-title":"IEEE Embed. Syst. Lett."},{"key":"12_CR36","doi-asserted-by":"crossref","unstructured":"Sui, Y., Xue, J.: SVF: interprocedural static value-flow analysis in LLVM. In: Proceedings of the 25th International Conference on Compiler Construction, pp. 265\u2013266 (2016)","DOI":"10.1145\/2892208.2892235"},{"key":"12_CR37","doi-asserted-by":"crossref","unstructured":"Wang, T., He, H., et\u00a0al.: Conftainter: static taint analysis for configuration options. In: 38th ACM International Conference on Automated Software Engineering, pp. 1640\u20131651 (2023)","DOI":"10.1109\/ASE56229.2023.00067"},{"key":"12_CR38","doi-asserted-by":"crossref","unstructured":"Wang, X., Wen, X., et\u00a0al.: A dynamic cache partitioning mechanism under virtualization environment. In: IEEE 11th International Conference on Trust, Security and Privacy in Computing and Communications, pp. 1907\u20131911 (2012)","DOI":"10.1109\/TrustCom.2012.25"},{"key":"12_CR39","doi-asserted-by":"crossref","unstructured":"Wang, Y., Ferraiuolo, A., Zhang, D., Myers, A.C., Suh, G.E.: SecDCP: secure dynamic cache partitioning for efficient timing channel protection. In: 53nd ACM\/EDAC\/IEEE Design Automation Conference (DAC), pp.\u00a01\u20136 (2016)","DOI":"10.1145\/2897937.2898086"},{"key":"12_CR40","unstructured":"Werner, M., Unterluggauer, T., Giner, L., Schwarz, M., Gruss, D., et\u00a0al.: Scattercache: thwarting cache attacks via cache set randomization. In: Proceedings of the 28th USENIX Confernce on Security Symposium, pp. 675\u2013692. USENIX Association (2019)"},{"key":"12_CR41","unstructured":"Wichelmann, J., P\u00e4tschke, A., Wilke, L., Eisenbarth, T.: Cipherfix: mitigating ciphertext side-channel attacks in software. In: 32nd USENIX Security Symposium, pp. 6789\u20136806 (2023)"},{"key":"12_CR42","unstructured":"Yarom, Y., Falkner, K.: FLUSH+RELOAD: a high resolution, low noise, L3 cache side-channel attack. In: 23rd USENIX Security Symposium, pp. 719\u2013732 (2014)"},{"key":"12_CR43","doi-asserted-by":"crossref","unstructured":"Zhang, R., Bond, M.D., Zhang, Y.: Cape: compiler-aided program transformation for HTM-based cache side-channel defense. In: Proceedings of the 31st ACM SIGPLAN International Conference on Compiler Construction, pp. 181\u2013193 (2022)","DOI":"10.1145\/3497776.3517778"},{"key":"12_CR44","doi-asserted-by":"crossref","unstructured":"Zhang, X., Xiao, Y., Zhang, Y.: Return-Oriented Flush-Reload Side Channels on ARM and Their Implications for Android Devices, pp. 858\u2013870 (2016)","DOI":"10.1145\/2976749.2978360"}],"container-title":["Lecture Notes in Computer Science","Security, Privacy, and Applied Cryptography Engineering"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-032-16342-4_12","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,2,11]],"date-time":"2026-02-11T08:58:12Z","timestamp":1770800292000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-032-16342-4_12"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026]]},"ISBN":["9783032163417","9783032163424"],"references-count":44,"URL":"https:\/\/doi.org\/10.1007\/978-3-032-16342-4_12","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026]]},"assertion":[{"value":"12 February 2026","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"SPACE","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Security, Privacy, and Applied Cryptography Engineering","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Guwahati","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"India","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2025","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"16 December 2025","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"19 December 2025","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"15","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"space2025","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"https:\/\/event.iitg.ac.in\/space2025\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}}]}}