{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,27]],"date-time":"2025-03-27T00:44:30Z","timestamp":1743036270695,"version":"3.40.3"},"publisher-location":"Cham","reference-count":26,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319014173"},{"type":"electronic","value":"9783319014180"}],"license":[{"start":{"date-parts":[[2013,8,14]],"date-time":"2013-08-14T00:00:00Z","timestamp":1376438400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2013,8,14]],"date-time":"2013-08-14T00:00:00Z","timestamp":1376438400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014]]},"DOI":"10.1007\/978-3-319-01418-0_6","type":"book-chapter","created":{"date-parts":[[2013,9,18]],"date-time":"2013-09-18T10:39:50Z","timestamp":1379500790000},"page":"89-108","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["A Design and Verification Methodology for Mixed-Signal Systems Using SystemC-AMS"],"prefix":"10.1007","author":[{"given":"Yao","family":"Li","sequence":"first","affiliation":[]},{"given":"Ramy","family":"Iskander","sequence":"additional","affiliation":[]},{"given":"Farakh","family":"Javid","sequence":"additional","affiliation":[]},{"given":"Marie-Minerve","family":"Lou\u00ebrat","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2013,8,14]]},"reference":[{"key":"6_CR1","doi-asserted-by":"crossref","unstructured":"Rutenbar, R.A.: Design automation for analog: the next generation of tool challenges. In: ACM International Conference on Computer-Aided Design, San Jose, pp.\u00a0458\u2013460 (2006)","DOI":"10.1109\/ICCAD.2006.320157"},{"key":"6_CR2","unstructured":"Taranovich, S.: Analog design in the 21st century: challenges, tools, and IC advances. http:\/\/www.edn.com (2012)"},{"key":"6_CR3","volume-title":"Analog Design Centering and Sizing","author":"H.E. Graeb","year":"2007","unstructured":"Graeb, H.E.: Analog Design Centering and Sizing. Springer, Heidelberg (2007)"},{"key":"6_CR4","unstructured":"Accellera Systems Initiative: SystemC AMS 2.0 standard. http:\/\/www.accellera.org\/downloads\/standards\/systemc\/ams\/ (2013)"},{"key":"6_CR5","volume-title":"The SPICE Book","author":"A. Vladimirescu","year":"1994","unstructured":"Vladimirescu, A.: The SPICE Book. Wiley, New York (1994)"},{"key":"6_CR6","unstructured":"Sommer, R., Rugen-Herzig, I., Hennig, E., Gatti, U., Malcovati, P., Maloberti, F., Einwich, K., Clauss, C., Schwarz, P., Noessing, G.: From system specification to layout: seamless top-down design methods for analog and mixed-signal applications. In: Design, Automation and Test in Europe, Paris, pp.\u00a0884\u2013891 (2002)"},{"key":"6_CR7","unstructured":"IEEE Computer Society: 1666\u20132011 IEEE Standard SystemC Language Reference Manual. IEEE, 1666\u20132011."},{"key":"6_CR8","doi-asserted-by":"publisher","DOI":"10.1155\/2010\/489365","author":"Y. Zaidi","year":"2010","unstructured":"Zaidi, Y., Grimm, C., Hasse, J.: On mixed abstraction, languages, and simulation approach to refinement with systemC AMS. EURASIP J. Embed. Syst. (2010). doi:10.1155\/2010\/489365","journal-title":"EURASIP J. Embed. Syst."},{"key":"6_CR9","doi-asserted-by":"crossref","unstructured":"Kirchner, T., Bannow, N., Grimm, C.: Analogue mixed signal simulation using spice and SystemC. In: Design, Automation Test in Europe Conference Exhibition, Nice, pp.\u00a0284\u2013287 (2009)","DOI":"10.1109\/DATE.2009.5090672"},{"key":"6_CR10","doi-asserted-by":"publisher","first-page":"93","DOI":"10.1007\/s10470-007-9075-3","volume":"56","author":"R. Iskander","year":"2008","unstructured":"Iskander, R., Lou\u00ebrat, M.-M., Kaiser, A.: Automatic DC operating point computation and design plan generation for analog IPs. Analog Integr. Circuit Signal Process. J. 56, 93\u2013105 (2008)","journal-title":"Analog Integr. Circuit Signal Process. J."},{"key":"6_CR11","first-page":"123","volume":"233","author":"R. Iskander","year":"2013","unstructured":"Iskander, R., Lou\u00ebrat, M.-M., Kaiser, A.: Hierarchical sizing and biasing of analog firm intellectual properties. Integr. VLSI J. 233, 123\u2013148 (2013)","journal-title":"Integr. VLSI J."},{"key":"6_CR12","doi-asserted-by":"crossref","unstructured":"Javid, F., Iskander, R., Lou\u00ebrat, M.-M.: Simulation-based hierarchical sizing and biasing of analog firm IPs. In: IEEE International Behavioral Modeling and Simulation Conference, San Jose, pp.\u00a043\u201348 (2009)","DOI":"10.1109\/BMAS.2009.5338891"},{"key":"6_CR13","unstructured":"Javid, F., Iskander, R., Durbin, F., Lou\u00ebrat, M.-M.: Analog circuits sizing using the fixed point iteration algorithm with transistor compact models. In: IEEE Mixed Design of Integrated Circuits and Systems, Warsaw, pp.\u00a045\u201350 (2012)"},{"key":"6_CR14","unstructured":"Vachoux, A., Grimm, C., Einwich, K.: Extending SystemC to support mixed discrete-continuous system modeling and simulation. In: IEEE International Symposium on Circuits and Systems, Kobe, pp.\u00a05166\u20135169 (2005)"},{"key":"6_CR15","unstructured":"Mu, Z., Van Leuken, R.: SystemC-AMS model of a dynamic large-scale satellite-based AIS-like network. In: Forum on Specification and Design Languages, Oldenburg, pp.\u00a01\u20138 (2011)"},{"key":"6_CR16","doi-asserted-by":"crossref","unstructured":"Cenni, F., Scotti, S., Simeu, E.: Behavioral modeling of a CMOS video sensor platform using systemc AMS\/TLM. In: Forum on Specification and Design Languages, Oldenburg, pp.\u00a01\u20136 (2011)","DOI":"10.1109\/VLSISoC.2011.6081614"},{"key":"6_CR17","doi-asserted-by":"crossref","unstructured":"Levi, T., Lewis, N., Tomas, J., Fouillat, P.: IP-based methodology for analog design flow: application on neuromorphic engineering. In: IEEE International NEWCAS-TAISA Conference, Montreal, pp.\u00a0343\u2013346 (2008)","DOI":"10.1109\/NEWCAS.2008.4606391"},{"issue":"6","key":"6_CR18","doi-asserted-by":"publisher","first-page":"1050","DOI":"10.1109\/JPROC.2006.873611","volume":"94","author":"R. Saleh","year":"2006","unstructured":"Saleh, R., Wilton, S., Mirabbasi, S., Hu, A., Greenstreet, M., Lemieux, G., Pande, P.P., Grecu, C., Ivanov, A.: System-on-chip: reuse and integration. Proc. IEEE 94(6), 1050\u20131069 (2006)","journal-title":"Proc. IEEE"},{"key":"6_CR19","doi-asserted-by":"crossref","DOI":"10.1109\/9780470547182","volume-title":"MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4","author":"W. Liu","year":"2001","unstructured":"Liu, W.: MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4. Wiley, New York (2001)"},{"key":"6_CR20","unstructured":"NXP. MOS model PSP level 103. http:\/\/www.nxp.com\/models\/mos\/_models\/psp\/ (2011)"},{"issue":"1","key":"6_CR21","doi-asserted-by":"publisher","first-page":"83","DOI":"10.1007\/BF01239381","volume":"8","author":"C. Enz","year":"1995","unstructured":"Enz, C., Krummenacher, F., Vittoz, E.: An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications. Analog Integr. Circuits Signal Process. J. 8(1), 83\u2013114 (1995)","journal-title":"Analog Integr. Circuits Signal Process. J."},{"key":"6_CR22","doi-asserted-by":"crossref","unstructured":"Javid, F., Iskander, R., Lou\u00ebrat, M.-M., Dupuis, D.: Analog circuits sizing using bipartite graphs. In: IEEE International Midwest Symposium on Circuits and Systems, Seoul, pp.\u00a01\u20134 (2011)","DOI":"10.1109\/MWSCAS.2011.6026591"},{"key":"6_CR23","unstructured":"Libes, D.: Exploring Expect: A Tcl-Based Toolkit for Automating Interactive Programs. O\u2019Reilly Meida, Sebastopol (1994)"},{"key":"6_CR24","doi-asserted-by":"crossref","unstructured":"Maehne, T., Vachoux, A., Giroud, F., Contaldo, M.: A VHDL-AMS modeling methodology for top-down\/bottom-up design of RF systems. In: Forum on Specification and Design Languages, Sophia Antipolis, pp.\u00a01\u20137 (2009)","DOI":"10.1007\/978-90-481-9304-2_10"},{"key":"6_CR25","unstructured":"Graeb, H., Zizala, S., Eckmueller, J., Antreich, K.: The sizing rules method for analog integrated circuit design. In: IEEE\/ACM International Conference on Computer Aided Design, San Jose, pp.\u00a0343\u2013349 (2001)"},{"key":"6_CR26","volume-title":"CMOS Analog Circuit Design","author":"P.E. Allen","year":"2002","unstructured":"Allen, P.E., Holberg, D.R.: CMOS Analog Circuit Design. Oxford University Press, Oxford (2002)"}],"container-title":["Lecture Notes in Electrical Engineering","Models, Methods, and Tools for Complex Chip Design"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-01418-0_6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,2,9]],"date-time":"2023-02-09T18:06:07Z","timestamp":1675965967000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-01418-0_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8,14]]},"ISBN":["9783319014173","9783319014180"],"references-count":26,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-01418-0_6","relation":{},"ISSN":["1876-1100","1876-1119"],"issn-type":[{"type":"print","value":"1876-1100"},{"type":"electronic","value":"1876-1119"}],"subject":[],"published":{"date-parts":[[2013,8,14]]},"assertion":[{"value":"14 August 2013","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}