{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,17]],"date-time":"2025-06-17T05:08:35Z","timestamp":1750136915766,"version":"3.40.3"},"publisher-location":"Cham","reference-count":11,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319050317"},{"type":"electronic","value":"9783319050324"}],"license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014]]},"DOI":"10.1007\/978-3-319-05032-4_27","type":"book-chapter","created":{"date-parts":[[2014,3,7]],"date-time":"2014-03-07T09:36:26Z","timestamp":1394184986000},"page":"371-388","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Certifying Machine Code Safe from Hardware Aliasing: RISC is Not Necessarily Risky"],"prefix":"10.1007","author":[{"given":"Peter T.","family":"Breuer","sequence":"first","affiliation":[]},{"given":"Jonathan P.","family":"Bowen","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2014,3,8]]},"reference":[{"key":"27_CR1","volume-title":"Programming Embedded Systems in C and C++","author":"M Barr","year":"1998","unstructured":"Barr, M.: Programming Embedded Systems in C and C++, 1st edn. O\u2019Reilly & Associates Inc, Sebastopol (1998)","edition":"1"},{"issue":"10","key":"27_CR2","first-page":"637","volume":"14","author":"JP Bowen","year":"1990","unstructured":"Bowen, J.P.: Formal specification of the ProCoS\/Safemos instruction set. Micoproc. Microsys. 14(10), 637\u2013643 (1990)","journal-title":"Micoproc. Microsys."},{"key":"27_CR3","first-page":"131","volume-title":"The REDO Compendium Reverse Engineering for Software Maintenance, Chap. 10","author":"JP Bowen","year":"1993","unstructured":"Bowen, J.P., Breuer, P.T.: Decompilation. In: van Zuylen, H. (ed.) The REDO Compendium Reverse Engineering for Software Maintenance, Chap. 10, pp. 131\u2013138. Wiley, New York (1993)"},{"issue":"5","key":"27_CR4","doi-asserted-by":"publisher","first-page":"1613","DOI":"10.1145\/186025.186093","volume":"16","author":"PT Breuer","year":"1994","unstructured":"Breuer, P.T., Bowen, J.P.: Decompilation: the enumeration of types and grammars. ACM Trans. Program. Lang. Syst. 16(5), 1613\u20131647 (1994)","journal-title":"ACM Trans. Program. Lang. Syst."},{"key":"27_CR5","series-title":"LNCS","first-page":"22","volume-title":"ESSoS 2012","author":"PT Breuer","year":"2012","unstructured":"Breuer, P.T., Bowen, J.P.: Typed assembler for a RISC crypto-processor. In: Barthe, G., Livshits, B., Scandariato, R. (eds.) ESSoS 2012. LNCS, vol. 7159, pp. 22\u201329. Springer, Heidelberg (2012)"},{"key":"27_CR6","doi-asserted-by":"crossref","unstructured":"Breuer, P.T., Bowen, J.P.: A fully homomorphic crypto-processor design: correctness of a secret computer. In: J\u00fcrjens, J., Livshits, B., Scandariato, R. (eds.) ESSoS 2013. LNCS, vol. 7781, pp. 123\u2013138. Springer, Heidelberg (2013)","DOI":"10.1007\/978-3-642-36563-8_9"},{"key":"27_CR7","doi-asserted-by":"crossref","unstructured":"Breuer, P.T., Bowen, J.P.: Idea: towards a working fully homomorphic crypto-processor: practice and the secret computer. In: J\u00f6rjens, J., Pressens, F., Bielova, N. (eds.) ESSoS 2014. LNCS, vol. 8364, pp. 131\u2013140. Springer, Switzerland (2014)","DOI":"10.1007\/978-3-319-04897-0_9"},{"key":"27_CR8","unstructured":"Fischer, F.H., Sindalovsky, V., Segan, S.A.: Memory aliasing method and apparatus, 20 August 2002. US Patent 6,438,672"},{"issue":"1","key":"27_CR9","doi-asserted-by":"publisher","first-page":"8","DOI":"10.1145\/2465.214917","volume":"28","author":"DA Patterson","year":"1985","unstructured":"Patterson, D.A.: Reduced instruction set computers. Commun. ACM 28(1), 8\u201321 (1985)","journal-title":"Commun. ACM"},{"key":"27_CR10","doi-asserted-by":"crossref","unstructured":"Sato, T.: Speculative resolution of ambiguous memory aliasing. In: Innovative Architecture for Future Generation High-Performance Processors and Systems, pp. 17\u201326. IEEE (1997)","DOI":"10.1109\/IWIA.1997.670402"},{"key":"27_CR11","unstructured":"Wing, M.J., Kelly, E.J.: Method and apparatus for aliasing memory data in an advanced microprocessor, 20 July 1999. US Patent 5,926,832"}],"container-title":["Lecture Notes in Computer Science","Software Engineering and Formal Methods"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-05032-4_27","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,2,7]],"date-time":"2023-02-07T22:13:54Z","timestamp":1675808034000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-05032-4_27"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"ISBN":["9783319050317","9783319050324"],"references-count":11,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-05032-4_27","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2014]]},"assertion":[{"value":"8 March 2014","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}