{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,29]],"date-time":"2025-04-29T08:30:03Z","timestamp":1745915403284,"version":"3.40.3"},"publisher-location":"Cham","reference-count":20,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319070124"},{"type":"electronic","value":"9783319070131"}],"license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014]]},"DOI":"10.1007\/978-3-319-07013-1_22","type":"book-chapter","created":{"date-parts":[[2014,5,16]],"date-time":"2014-05-16T10:59:59Z","timestamp":1400237999000},"page":"233-242","source":"Crossref","is-referenced-by-count":17,"title":["Model Checking of UML Activity Diagrams in Logic Controllers Design"],"prefix":"10.1007","author":[{"given":"Iwona","family":"Grobelna","sequence":"first","affiliation":[]},{"given":"Micha\u0142","family":"Grobelny","sequence":"additional","affiliation":[]},{"given":"Marian","family":"Adamski","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"22_CR1","unstructured":"OMG Unified Modeling Language (OMG UML) Superstructure ver. 2.4.1. Object Management Group (2011)"},{"key":"22_CR2","doi-asserted-by":"crossref","unstructured":"Grobelny, M., Grobelna, I., Adamski, M.: Hardware behavioural modelling, verification and synthesis with UML 2.x activity diagrams. In: Proceedings of 11th IFAC\/IEEE International Conference on Programmable Devices and Embedded Systems (PDeS), Brno, pp. 109\u2013114 (2012)","DOI":"10.3182\/20120523-3-CZ-3015.00028"},{"key":"22_CR3","unstructured":"Grobelna, I., Grobelny, M., Adamski, M.: Petri Nets and activity diagrams in logic controller specification \u2013 transformation and verification. In: Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems, pp. 607\u2013612 (2010)"},{"issue":"1","key":"22_CR4","doi-asserted-by":"crossref","first-page":"27","DOI":"10.2478\/v10177-012-0004-8","volume":"58","author":"G. \u0141abiak","year":"2012","unstructured":"\u0141abiak, G., Adamski, M., Doligalski, M., Tkacz, J., Bukowiec, A.: UML modelling in rigorous design methodology for discrete controllers. International Journal of Electronics and Telecommunications\u00a058(1), 27\u201334 (2012)","journal-title":"International Journal of Electronics and Telecommunications"},{"key":"22_CR5","doi-asserted-by":"crossref","unstructured":"David, R., Alla, H.: Discrete, Continuous, and Hybrid Petri Nets. Springer (2010)","DOI":"10.1007\/978-3-642-10669-9"},{"key":"22_CR6","unstructured":"Grobelna, I.: Formal verification of logic controller specification by means of model checking. Lecture Notes in Control and Computer Science, vol.\u00a024. University of ZielonaG\u00f3ra Press (2013)"},{"key":"22_CR7","unstructured":"Grobelna, I.: Formal verification of embedded logic controller specification with computer deduction in temporal logic. Przegl\u0105d Elektrotechniczny\u00a0(12a), 40\u201343 (2011)"},{"key":"22_CR8","doi-asserted-by":"crossref","unstructured":"Kropf, T.: Introduction to Formal Hardware Verification. Springer (1999)","DOI":"10.1007\/978-3-662-03809-3"},{"key":"22_CR9","unstructured":"Clarke, E.M., Grumberg, O., Peled, D.A.: Model checking. The MIT Press (1999)"},{"key":"22_CR10","doi-asserted-by":"crossref","unstructured":"Emerson, E.A.: The Beginning of Model Checking: A Personal Perspective. In: Grumberg, O., Veith, H. (eds.) 25 Years of Model Checking: History, Achievements, Perspectives, pp. 27\u201345. Springer (2008)","DOI":"10.1007\/978-3-540-69850-0_2"},{"key":"22_CR11","doi-asserted-by":"crossref","unstructured":"Huth, M., Ryan, M.: Logic in Computer Science. Modelling and Reasoning about Systems. Cambridge University Press (2004)","DOI":"10.1017\/CBO9780511810275"},{"key":"22_CR12","unstructured":"Cavada, R., et al.: NuSMV 2.5 User Manual, \n                    http:\/\/nusmv.fbk.eu\/"},{"key":"22_CR13","unstructured":"Ahrends, S.: Neue Ans\u00e4tze f\u00fcr effizientes Rapid Prototyping von Embedded Systemen. In: Embedded Computing Conference (2008)"},{"issue":"2","key":"22_CR14","doi-asserted-by":"publisher","first-page":"401","DOI":"10.2478\/v10006-011-0030-1","volume":"21","author":"R. Wisniewski","year":"2011","unstructured":"Wisniewski, R., Barkalov, A., Titarenko, L., Halang, W.A.: Design of microprogrammed controllers to be implemented in FPGAs. International Journal of Applied Mathematics and Computer Science\u00a021(2), 401\u2013412 (2011)","journal-title":"International Journal of Applied Mathematics and Computer Science"},{"issue":"1","key":"22_CR15","first-page":"43","volume":"14","author":"V.S.W. Lam","year":"2007","unstructured":"Lam, V.S.W.: A Formalism for Reasoning about UML Activity Diagrams. Nordic Journal of Computing\u00a014(1), 43\u201364 (2007)","journal-title":"Nordic Journal of Computing"},{"key":"22_CR16","unstructured":"Achouri, A., Jemni Ben Ayed, L.: A Formal Semantic for UML 2.0 Activity Diagram based on Institution Theory. The International Journal of Soft Computing and Software Engineering (JSCSE)\u00a03(3) (2013); Special Issue: The Proceedings of International Conference on Soft Computing and Software Engineering, USA"},{"key":"22_CR17","doi-asserted-by":"crossref","unstructured":"Eshuis, R., Wieringa, R.: A Formal Semantics for UML Activity Diagrams - Formalising Workflow Models. University of Twente, Centre for Telematics and Information Technology technical reports series (2001)","DOI":"10.1007\/3-540-45314-8_7"},{"key":"22_CR18","doi-asserted-by":"crossref","unstructured":"Andreu, D., Souquet, G., Gil, T.: Petri Net based rapid prototyping of digital complex system. In: IEEE Computer Society Annual Symposium on VLSI, pp. 405\u2013410 (2008)","DOI":"10.1109\/ISVLSI.2008.54"},{"key":"22_CR19","unstructured":"Adamski, M., Choda\u0144, M.: Discreet control systems modelling using SFC nets. Wydawnictwo Politechniki Zielonog\u00f3rskiej (2000) (in Polish)"},{"key":"22_CR20","doi-asserted-by":"crossref","unstructured":"Tkacz, J., Adamski, M.: Logic design of structured configurable controllers. In: IEEE 3rd International Conference on Networked Embedded Systems for Every Application (NESEA), pp. 1\u20136 (2012)","DOI":"10.1109\/NESEA.2012.6474022"}],"container-title":["Advances in Intelligent Systems and Computing","Proceedings of the Ninth International Conference on Dependability and Complex Systems DepCoS-RELCOMEX. June 30 \u2013 July 4, 2014, Brun\u00f3w, Poland"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-07013-1_22","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,1,28]],"date-time":"2023-01-28T07:27:30Z","timestamp":1674890850000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-07013-1_22"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"ISBN":["9783319070124","9783319070131"],"references-count":20,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-07013-1_22","relation":{},"ISSN":["2194-5357","2194-5365"],"issn-type":[{"type":"print","value":"2194-5357"},{"type":"electronic","value":"2194-5365"}],"subject":[],"published":{"date-parts":[[2014]]}}}