{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,8]],"date-time":"2024-09-08T11:56:26Z","timestamp":1725796586531},"publisher-location":"Cham","reference-count":31,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319084930"},{"type":"electronic","value":"9783319084947"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014]]},"DOI":"10.1007\/978-3-319-08494-7_9","type":"book-chapter","created":{"date-parts":[[2014,7,5]],"date-time":"2014-07-05T14:50:00Z","timestamp":1404571800000},"page":"111-124","source":"Crossref","is-referenced-by-count":0,"title":["RevVis: Visualization of Structures and Properties in Reversible Circuits"],"prefix":"10.1007","author":[{"given":"Robert","family":"Wille","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jannis","family":"Stoppe","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eleonora","family":"Sch\u00f6nborn","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kamalika","family":"Datta","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rolf","family":"Drechsler","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"9_CR1","unstructured":"Nielsen, M., Chuang, I.: Quantum Computation and Quantum Information. Cambridge Univ. Press (2000)"},{"key":"9_CR2","doi-asserted-by":"publisher","first-page":"187","DOI":"10.1038\/nature10872","volume":"483","author":"A. Berut","year":"2012","unstructured":"Berut, A., Arakelyan, A., Petrosyan, A., Ciliberto, S., Dillenschneider, R., Lutz, E.: Experimental verification of Landauer\u2019s principle linking information and thermodynamics. Nature\u00a0483, 187\u2013189 (2012)","journal-title":"Nature"},{"key":"9_CR3","doi-asserted-by":"crossref","unstructured":"Wille, R., Drechsler, R., Osewold, C., Garcia-Ortiz, A.: Automatic design of low-power encoders using reversible circuit synthesis. In: Design, Automation and Test in Europe, pp. 1036\u20131041 (2012)","DOI":"10.1109\/DATE.2012.6176648"},{"key":"9_CR4","doi-asserted-by":"crossref","unstructured":"Drechsler, R., Wille, R.: From truth tables to programming languages: progress in the design of reversible circuits. In: Int\u2019l Symp. on Multi-Valued Logic, pp. 78\u201385 (2011)","DOI":"10.1109\/ISMVL.2011.40"},{"key":"9_CR5","doi-asserted-by":"crossref","unstructured":"Saeedi, M., Markov, I.L.: Synthesis and optimization of reversible circuits - a survey. ACM Computing Surveys\u00a045(2) (2011)","DOI":"10.1145\/2431211.2431220"},{"key":"9_CR6","unstructured":"Walsh, T.: Search in a small world. In: International Conference on AI, pp. 1172\u20131177 (1999)"},{"key":"9_CR7","doi-asserted-by":"crossref","unstructured":"Wille, R., Offermann, S., Drechsler, R.: SyReC: A programming language for synthesis of reversible circuits. In: Forum on Specification and Design Languages, pp. 184\u2013189 (2010)","DOI":"10.1049\/ic.2010.0150"},{"key":"9_CR8","doi-asserted-by":"crossref","unstructured":"Wettel, R., Lanza, M., Robbes, R.: Software systems as cities: a controlled experiment. In: International Conference on Software Engineering, pp. 551\u2013560 (2011)","DOI":"10.1145\/1985793.1985868"},{"key":"9_CR9","unstructured":"S\u00fclflow, A., Wille, R., Genz, C., Fey, G., Drechsler, R.: FormED: A formal environment for debugging. In: University Booth at the Design, Automation and Test in Europe (2009)"},{"key":"9_CR10","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"502","DOI":"10.1007\/978-3-540-24605-3_37","volume-title":"Theory and Applications of Satisfiability Testing","author":"N. E\u00e9n","year":"2004","unstructured":"E\u00e9n, N., S\u00f6rensson, N.: An Extensible SAT-solver. In: Giunchiglia, E., Tacchella, A. (eds.) SAT 2003. LNCS, vol.\u00a02919, pp. 502\u2013518. Springer, Heidelberg (2004)"},{"issue":"2","key":"9_CR11","doi-asserted-by":"publisher","first-page":"219","DOI":"10.1007\/s10817-007-9074-1","volume":"39","author":"C. Sinz","year":"2007","unstructured":"Sinz, C.: Visualizing SAT instances and runs of the DPLL algorithm. J. Autom. Reasoning\u00a039(2), 219\u2013243 (2007)","journal-title":"J. Autom. Reasoning"},{"key":"9_CR12","doi-asserted-by":"crossref","unstructured":"Toffoli, T.: Reversible computing. In: de Bakker, W., van Leeuwen, J. (eds.) Automata, Languages and Programming. Springer (1980); 632 Technical Memo MIT\/LCS\/TM-151, MIT Lab. for Comput. Sci.","DOI":"10.1007\/3-540-10003-2_104"},{"issue":"3-4","key":"9_CR13","doi-asserted-by":"publisher","first-page":"219","DOI":"10.1007\/BF01857727","volume":"21","author":"E. Fredkin","year":"1982","unstructured":"Fredkin, E., Toffoli, T.: Conservative logic. Int\u2019l Journal of Theoretical Physics\u00a021(3-4), 219\u2013253 (1982)","journal-title":"Int\u2019l Journal of Theoretical Physics"},{"issue":"6","key":"9_CR14","doi-asserted-by":"publisher","first-page":"3266","DOI":"10.1103\/PhysRevA.32.3266","volume":"32","author":"A. Peres","year":"1985","unstructured":"Peres, A.: Reversible logic and quantum computers. Phys. Rev. A\u00a032(6), 3266\u20133276 (1985)","journal-title":"Phys. Rev. A"},{"issue":"11","key":"9_CR15","doi-asserted-by":"publisher","first-page":"1497","DOI":"10.1109\/TCAD.2004.836735","volume":"23","author":"D. Maslov","year":"2004","unstructured":"Maslov, D., Dueck, G.W.: Reversible cascades with minimal garbage. Trans. on CAD\u00a023(11), 1497\u20131509 (2004)","journal-title":"Trans. on CAD"},{"key":"9_CR16","doi-asserted-by":"crossref","unstructured":"Wille, R., Kesz\u00f6cze, O., Drechsler, R.: Determining the minimal number of lines for large reversible circuits. In: Design, Automation and Test in Europe, pp. 1204\u20131207 (2011)","DOI":"10.1109\/DATE.2011.5763314"},{"key":"9_CR17","doi-asserted-by":"crossref","unstructured":"Miller, D.M., Maslov, D., Dueck, G.W.: A transformation based algorithm for reversible logic synthesis. In: Design Automation Conf., pp. 318\u2013323 (2003)","DOI":"10.1145\/775914.775915"},{"issue":"3","key":"9_CR18","doi-asserted-by":"publisher","first-page":"436","DOI":"10.1109\/TCAD.2007.911334","volume":"27","author":"D. Maslov","year":"2008","unstructured":"Maslov, D., Dueck, G.: Quantum circuit simplification and level compaction. Trans. on CAD\u00a027(3), 436\u2013444 (2008)","journal-title":"Trans. on CAD"},{"key":"9_CR19","doi-asserted-by":"crossref","unstructured":"Wille, R., Soeken, M., Otterstedt, C., Drechsler, R.: Improving the mapping of reversible circuits to quantum circuits using multiple target lines. In: ASP Design Automation Conf. (2013)","DOI":"10.1109\/ASPDAC.2013.6509587"},{"key":"9_CR20","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"209","DOI":"10.1007\/978-3-642-38986-3_17","volume-title":"Reversible Computation","author":"K. Datta","year":"2013","unstructured":"Datta, K., Rathi, G., Wille, R., Sengupta, I., Rahaman, H., Drechsler, R.: Exploiting negative control lines in the optimization of reversible circuits. In: Dueck, G.W., Miller, D.M. (eds.) RC 2013. LNCS, vol.\u00a07948, pp. 209\u2013220. Springer, Heidelberg (2013)"},{"key":"9_CR21","doi-asserted-by":"crossref","unstructured":"Fazel, K., Thornton, M.A., Rice, J.E.: ESOP-based Toffoli gate cascade generation. In: Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 206\u2013209 (2007)","DOI":"10.1109\/PACRIM.2007.4313212"},{"key":"9_CR22","doi-asserted-by":"crossref","unstructured":"Wille, R., Drechsler, R.: BDD-based synthesis of reversible logic for large functions. In: Design Automation Conf., pp. 270\u2013275 (2009)","DOI":"10.1145\/1629911.1629984"},{"key":"9_CR23","doi-asserted-by":"crossref","unstructured":"Wille, R., Soeken, M., Drechsler, R.: Reducing the number of lines in reversible circuits. In: Design Automation Conf., pp. 647\u2013652 (2010)","DOI":"10.1145\/1837274.1837439"},{"issue":"3","key":"9_CR24","doi-asserted-by":"publisher","first-page":"355","DOI":"10.1007\/s11128-010-0201-2","volume":"10","author":"M. Saeedi","year":"2011","unstructured":"Saeedi, M., Wille, R., Drechsler, R.: Synthesis of quantum circuits for linear nearest neighbor architectures. Quantum Information Processing\u00a010(3), 355\u2013377 (2011)","journal-title":"Quantum Information Processing"},{"issue":"10","key":"9_CR25","doi-asserted-by":"publisher","first-page":"3319","DOI":"10.1007\/s11128-013-0601-1","volume":"12","author":"M. Alfailakawi","year":"2013","unstructured":"Alfailakawi, M., Alterkawi, L., Ahmad, I., Hamdan, S.: Line ordering of reversible circuits for linear nearest neighbor realization. Quantum Information Processing\u00a012(10), 3319\u20133339 (2013)","journal-title":"Quantum Information Processing"},{"key":"9_CR26","doi-asserted-by":"crossref","unstructured":"Shafaei, A., Saeedi, M., Pedram, M.: Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures. In: Design Automation Conf., vol.\u00a041 (2013)","DOI":"10.1145\/2463209.2488785"},{"key":"9_CR27","doi-asserted-by":"crossref","unstructured":"Wille, R., Lye, A., Drechsler, R.: Optimal SWAP gate insertion for nearest neighbor quantum circuits. In: ASP Design Automation Conf., pp. 489\u2013494 (2014)","DOI":"10.1109\/ASPDAC.2014.6742939"},{"key":"9_CR28","doi-asserted-by":"crossref","unstructured":"Miller, D.M., Wille, R., Drechsler, R.: Reducing reversible circuit cost by adding lines. In: Int\u2019l Symp. on Multi-Valued Logic (2010)","DOI":"10.1109\/ISMVL.2010.48"},{"key":"9_CR29","doi-asserted-by":"crossref","unstructured":"Wille, R., Soeken, M., Sch\u00f6nborn, E., Drechsler, R.: Circuit line minimization in the HDL-based synthesis of reversible logic. In: Annual Symposium on VLSI, pp. 213\u2013218 (2012)","DOI":"10.1109\/ISVLSI.2012.43"},{"key":"9_CR30","doi-asserted-by":"crossref","unstructured":"Wille, R., Gro\u00dfe, D., Teuber, L., Dueck, G.W., Drechsler, R.: RevLib: an online resource for reversible functions and reversible circuits. In: Int\u2019l Symp. on Multi-Valued Logic, pp. 220\u2013225 (2008), RevLib is available at \n                    \n                      http:\/\/www.revlib.org","DOI":"10.1109\/ISMVL.2008.43"},{"issue":"8","key":"9_CR31","doi-asserted-by":"publisher","first-page":"677","DOI":"10.1109\/TC.1986.1676819","volume":"35","author":"R.E. Bryant","year":"1986","unstructured":"Bryant, R.E.: Graph-based algorithms for Boolean function manipulation. Trans. on Comp.\u00a035(8), 677\u2013691 (1986)","journal-title":"Trans. on Comp."}],"container-title":["Lecture Notes in Computer Science","Reversible Computation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-08494-7_9","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,5,27]],"date-time":"2019-05-27T07:01:57Z","timestamp":1558940517000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-08494-7_9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"ISBN":["9783319084930","9783319084947"],"references-count":31,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-08494-7_9","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2014]]}}}