{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T10:38:44Z","timestamp":1742985524532,"version":"3.40.3"},"publisher-location":"Cham","reference-count":32,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319099668"},{"type":"electronic","value":"9783319099675"}],"license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014]]},"DOI":"10.1007\/978-3-319-09967-5_13","type":"book-chapter","created":{"date-parts":[[2014,9,30]],"date-time":"2014-09-30T15:10:04Z","timestamp":1412089804000},"page":"217-233","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":10,"title":["DRIFT: Decoupled CompileR-Based Instruction-Level Fault-Tolerance"],"prefix":"10.1007","author":[{"given":"Konstantina","family":"Mitropoulou","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Vasileios","family":"Porpodas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marcelo","family":"Cintra","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2014,10,1]]},"reference":[{"key":"13_CR1","unstructured":"GCC: GNU compiler collection. http:\/\/gcc.gnu.org"},{"key":"13_CR2","unstructured":"SKI, an IA64 instruction set simulator. http:\/\/ski.sourceforge.net"},{"key":"13_CR3","unstructured":"Austin, T.: DIVA: a reliable substrate for deep submicron microarchitecture design. In: MICRO (1999)"},{"key":"13_CR4","unstructured":"Bernick, D., et al.: Nonstop advanced architecture. In: DSN (2005)"},{"key":"13_CR5","unstructured":"Chang, J., et al.: Automatic instruction-level software-only recovery. In: DSN (2006)"},{"key":"13_CR6","doi-asserted-by":"publisher","first-page":"14","DOI":"10.1109\/MM.2003.1225959","volume":"23","author":"C Constantinescu","year":"2003","unstructured":"Constantinescu, C.: Trends and challenges in VLSI circuit reliability. IEEE Micro 23, 14\u201319 (2003)","journal-title":"IEEE Micro"},{"key":"13_CR7","doi-asserted-by":"crossref","unstructured":"Feng, S., et al.: Shoestring: probabilistic soft error reliability on the cheap. In: ASPLOS (2010)","DOI":"10.1145\/1736020.1736063"},{"key":"13_CR8","doi-asserted-by":"crossref","unstructured":"Fritts, J., et al.: Mediabench II video: expediting the next generation of video systems research. In: SPIE (2005)","DOI":"10.1117\/12.587955"},{"key":"13_CR9","unstructured":"Ghosh, Y., et al.: Runtime asynchronous fault tolerance via speculation. In: CGO (2012)"},{"key":"13_CR10","doi-asserted-by":"publisher","first-page":"28","DOI":"10.1109\/2.869367","volume":"33","author":"J Henning","year":"2000","unstructured":"Henning, J.: SPEC CPU2000: measuring CPU performance in the new millennium. IEEE Comput. 33, 28\u201335 (2000)","journal-title":"IEEE Comput."},{"key":"13_CR11","doi-asserted-by":"publisher","first-page":"229","DOI":"10.1007\/BF01205185","volume":"7","author":"W-MW Hwu","year":"1993","unstructured":"Hwu, W.-M.W., et al.: The superblock: an effective technique for VLIW and superscalar compilation. J. Supercomput. 7, 229\u2013248 (1993)","journal-title":"J. Supercomput."},{"key":"13_CR12","doi-asserted-by":"crossref","unstructured":"LaFrieda, C., et al.: Utilizing dynamically coupled cores to form a resilient chip multiprocessor. In: DSN (2007)","DOI":"10.1109\/DSN.2007.100"},{"key":"13_CR13","doi-asserted-by":"crossref","unstructured":"Li, M., et al.: Understanding the propagation of hard errors to software and implications for resilient system design. In: ASPLOS (2008)","DOI":"10.1145\/1346281.1346315"},{"key":"13_CR14","doi-asserted-by":"publisher","first-page":"51","DOI":"10.1007\/BF01205182","volume":"7","author":"PG Lowney","year":"1993","unstructured":"Lowney, P.G., et al.: The multiflow trace scheduling compiler. J. Supercomput. 7, 51\u2013142 (1993)","journal-title":"J. Supercomput."},{"key":"13_CR15","doi-asserted-by":"crossref","unstructured":"Mahlke, S., et al.: Sentinel scheduling for vliw and superscalar processors. In: ASPLOS (1992)","DOI":"10.1145\/143365.143529"},{"key":"13_CR16","doi-asserted-by":"publisher","first-page":"160","DOI":"10.1109\/12.2145","volume":"37","author":"A Mahmood","year":"1988","unstructured":"Mahmood, A., et al.: Concurrent error detection using watchdog processors-a survey. IEEE Trans. Comput. 37, 160\u2013174 (1988)","journal-title":"IEEE Trans. Comput."},{"key":"13_CR17","doi-asserted-by":"publisher","first-page":"44","DOI":"10.1109\/MM.2003.1196114","volume":"23","author":"C McNairy","year":"2003","unstructured":"McNairy, C., et al.: Itanium 2 processor microarchitecture. IEEE Micro 23, 44\u201355 (2003)","journal-title":"IEEE Micro"},{"key":"13_CR18","doi-asserted-by":"publisher","first-page":"329","DOI":"10.1109\/TDMR.2005.855685","volume":"5","author":"S Michalak","year":"2005","unstructured":"Michalak, S., et al.: Predicting the number of fatal soft errors in Los Alamos national laboratory\u2019s ASC Q supercomputer. IEEE Trans. Device Mater. Reliab. 5, 329\u2013335 (2005)","journal-title":"IEEE Trans. Device Mater. Reliab."},{"key":"13_CR19","doi-asserted-by":"crossref","unstructured":"Mukherjee, S., et al.: Detailed design and evaluation of redundant multithreading alternatives. In: ISCA (2002)","DOI":"10.1145\/545214.545227"},{"key":"13_CR20","doi-asserted-by":"publisher","first-page":"63","DOI":"10.1109\/24.994913","volume":"51","author":"N Oh","year":"2002","unstructured":"Oh, N., et al.: Error detection by duplicated instructions in super-scalar processors. IEEE Trans. Reliab. 51, 63\u201375 (2002)","journal-title":"IEEE Trans. Reliab."},{"key":"13_CR21","doi-asserted-by":"crossref","unstructured":"Reinhardt, S., et al.: Transient fault detection via simultaneous multithreading. In: ISCA (2000)","DOI":"10.1145\/339647.339652"},{"key":"13_CR22","unstructured":"Reis, G., et al.: SWIFT: software implemented fault tolerance. In: CGO (2005)"},{"key":"13_CR23","unstructured":"Rotenberg, E.: AR-SMT: a microarchitectural approach to fault tolerance in microprocessors. In: FTCS (1999)"},{"key":"13_CR24","unstructured":"Shivakumar, P., et al.: Modeling the effect of technology trends on the soft error rate of combinational logic. In: DSN (2002)"},{"key":"13_CR25","doi-asserted-by":"crossref","unstructured":"Shye, A., et al.: Using process-level redundancy to exploit multiple cores for transient fault tolerance. In: DSN (2007)","DOI":"10.1109\/DSN.2007.98"},{"issue":"2","key":"13_CR26","doi-asserted-by":"publisher","first-page":"12","DOI":"10.1109\/40.755464","volume":"19","author":"T Slegel","year":"1999","unstructured":"Slegel, T., et al.: IBM\u2019s S\/390 G5 microprocessor design. IEEE Micro 19(2), 12\u201323 (1999)","journal-title":"IEEE Micro"},{"key":"13_CR27","doi-asserted-by":"crossref","unstructured":"Smolens, J., et al.: Reunion: complexity-effective multicore redundancy. In: MICRO (2006)","DOI":"10.1109\/MICRO.2006.42"},{"key":"13_CR28","doi-asserted-by":"crossref","unstructured":"Sorin, D.: Fault tolerant computer architecture. Synthesis Lectures on Computer Architecture (2009)","DOI":"10.1007\/978-3-031-01723-0"},{"key":"13_CR29","doi-asserted-by":"crossref","unstructured":"Srinivasan, J., et al.: The impact of technology scaling on lifetime reliability. In: DSN (2004)","DOI":"10.1109\/DSN.2004.1311888"},{"key":"13_CR30","doi-asserted-by":"crossref","unstructured":"Wang, C., et al.: Compiler-managed software-based redundant multi-threading for transient fault detection. In: CGO (2007)","DOI":"10.1109\/CGO.2007.7"},{"key":"13_CR31","doi-asserted-by":"publisher","first-page":"188","DOI":"10.1109\/TDSC.2006.40","volume":"3","author":"N Wang","year":"2006","unstructured":"Wang, N., et al.: ReStore: symptom-based soft error detection in microprocessors. IEEE Trans. Dependable Secure Comput. 3, 188\u2013201 (2006)","journal-title":"IEEE Trans. Dependable Secure Comput."},{"key":"13_CR32","doi-asserted-by":"crossref","unstructured":"Zhang, Y., et al.: DAFT: decoupled acyclic fault tolerance. In: PACT (2010)","DOI":"10.1145\/1854273.1854289"}],"container-title":["Lecture Notes in Computer Science","Languages and Compilers for Parallel Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-09967-5_13","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,2,20]],"date-time":"2023-02-20T11:00:56Z","timestamp":1676890856000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-09967-5_13"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"ISBN":["9783319099668","9783319099675"],"references-count":32,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-09967-5_13","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2014]]},"assertion":[{"value":"1 October 2014","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}