{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,14]],"date-time":"2025-05-14T04:27:29Z","timestamp":1747196849090,"version":"3.40.5"},"publisher-location":"Cham","reference-count":16,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319143125"},{"type":"electronic","value":"9783319143132"}],"license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014]]},"DOI":"10.1007\/978-3-319-14313-2_19","type":"book-chapter","created":{"date-parts":[[2014,12,11]],"date-time":"2014-12-11T01:56:46Z","timestamp":1418263006000},"page":"218-229","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Evaluating Execution Time Predictability of Task-Based Programs on Multi-Core Processors"],"prefix":"10.1007","author":[{"given":"Thomas","family":"Grass","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alejandro","family":"Rico","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marc","family":"Casas","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Miquel","family":"Moreto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alex","family":"Ramirez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"19_CR1","unstructured":"Amarasinghe, S., et al.: ASCR programming challenged for exascale computing. Report of the 2011 Workshop on Exascale Programming Challenges (2011)"},{"key":"19_CR2","unstructured":"Bienia, C., et al.: Benchmarking Modern Multiprocessors. PhD thesis, Princeton University (January 2011)"},{"issue":"3","key":"19_CR3","doi-asserted-by":"publisher","first-page":"189","DOI":"10.1177\/109434200001400303","volume":"14","author":"S. Browne","year":"2000","unstructured":"Browne, S., et al.: A portable programming interface for performance evaluation on modern processors. Journal of High Performance Computing Applications\u00a014(3), 189\u2013204 (2000)","journal-title":"Journal of High Performance Computing Applications"},{"key":"19_CR4","doi-asserted-by":"crossref","unstructured":"Duran, A., et al.: Barcelona openmp tasks suite: A set of benchmarks targeting the exploitation of task parallelism in openmp. In: ICPP 2009, pp. 124\u2013131 (2009)","DOI":"10.1109\/ICPP.2009.64"},{"issue":"02","key":"19_CR5","doi-asserted-by":"publisher","first-page":"173","DOI":"10.1142\/S0129626411000151","volume":"21","author":"A. Duran","year":"2011","unstructured":"Duran, A., et al.: OmpSs: a proposal for programming heterogeneous multi-core architectures. Parallel Processing Letters\u00a021(02), 173\u2013193 (2011)","journal-title":"Parallel Processing Letters"},{"key":"19_CR6","doi-asserted-by":"crossref","unstructured":"Genbrugge, D., et al.: Interval Simulation: Raising the Level of Abstraction in Architectural Simulation. In: HPCA 2010, pp. 1\u201312 (2010)","DOI":"10.1109\/HPCA.2010.5416636"},{"key":"19_CR7","unstructured":"Halfhill, T.R.: ARM\u2019s 64-Bit Makeover. Microprocessor Report (December 24, 2012)"},{"key":"19_CR8","doi-asserted-by":"crossref","unstructured":"Karkhanis, T.S., et al.: A first-order superscalar processor model. In: ISCA, Washington, DC, USA, p. 338 (2004)","DOI":"10.1145\/1028176.1006729"},{"key":"19_CR9","doi-asserted-by":"crossref","unstructured":"Kerbyson, D.J., et al.: Predictive Performance and Scalability Modeling of a Large-scale Application. In: Supercomputing 2001, p. 37 (2001)","DOI":"10.1145\/582034.582071"},{"key":"19_CR10","doi-asserted-by":"crossref","unstructured":"Nussbaum, S., et al.: Modeling superscalar processors via statistical simulation. In: PACT, pp. 15\u201324 (2001)","DOI":"10.1109\/PACT.2001.953284"},{"key":"19_CR11","doi-asserted-by":"crossref","unstructured":"Olivier, S.L., et al.: Characterizing and mitigating work time inflation in task parallel programs. In: 2012 International Conference for High Performance Computing, Networking, Storage and Analysis (SC), pp. 1\u201312. IEEE (2012)","DOI":"10.1109\/SC.2012.27"},{"key":"19_CR12","doi-asserted-by":"crossref","unstructured":"Rajovic, N., et al.: Experiences with Mobile Processors for Energy Efficient HPC. In: DATE 2013, pp. 464\u2013468 (2013)","DOI":"10.7873\/DATE.2013.103"},{"key":"19_CR13","doi-asserted-by":"crossref","unstructured":"Rajovic, N., et al.: Supercomputing with Commodity CPUs: Are Mobile SoCs Ready for HPC? In: SC 2013 (2013)","DOI":"10.1145\/2503210.2503281"},{"issue":"1-2","key":"19_CR14","doi-asserted-by":"crossref","first-page":"59","DOI":"10.1155\/2009\/741282","volume":"17","author":"A. Rico","year":"2009","unstructured":"Rico, A., et al.: Available Task-level Parallelism on the Cell BE. Scientific Programming\u00a017(1-2), 59\u201376 (2009)","journal-title":"Scientific Programming"},{"key":"19_CR15","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"196","DOI":"10.1007\/978-3-642-30961-8_15","volume-title":"OpenMP in a Heterogeneous World","author":"D. Schmidl","year":"2012","unstructured":"Schmidl, D., Philippen, P., Lorenz, D., R\u00f6ssel, C., Geimer, M., an Mey, D., Mohr, B., Wolf, F.: Performance analysis techniques for task-based openMP applications. In: Chapman, B.M., Massaioli, F., M\u00fcller, M.S., Rorro, M. (eds.) IWOMP 2012. LNCS, vol.\u00a07312, pp. 196\u2013209. Springer, Heidelberg (2012)"},{"key":"19_CR16","doi-asserted-by":"crossref","unstructured":"Snavely, A., et al.: A Framework for Performance Modeling and Prediction. In: Supercomputing 2002, pp. 1\u201317 (2002)","DOI":"10.1109\/SC.2002.10004"}],"container-title":["Lecture Notes in Computer Science","Euro-Par 2014: Parallel Processing Workshops"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-14313-2_19","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,14]],"date-time":"2025-05-14T00:31:52Z","timestamp":1747182712000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-14313-2_19"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014]]},"ISBN":["9783319143125","9783319143132"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-14313-2_19","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2014]]},"assertion":[{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}