{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,1]],"date-time":"2026-07-01T03:11:30Z","timestamp":1782875490681,"version":"3.54.5"},"publisher-location":"Cham","reference-count":17,"publisher":"Springer International Publishing","isbn-type":[{"value":"9783319162133","type":"print"},{"value":"9783319162140","type":"electronic"}],"license":[{"start":{"date-parts":[[2015,1,1]],"date-time":"2015-01-01T00:00:00Z","timestamp":1420070400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2015,1,1]],"date-time":"2015-01-01T00:00:00Z","timestamp":1420070400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015]]},"DOI":"10.1007\/978-3-319-16214-0_42","type":"book-chapter","created":{"date-parts":[[2015,3,30]],"date-time":"2015-03-30T22:56:39Z","timestamp":1427756199000},"page":"451-460","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":180,"title":["Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL"],"prefix":"10.1007","author":[{"given":"Shinya","family":"Takamaeda-Yamazaki","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2015,3,31]]},"reference":[{"key":"42_CR1","doi-asserted-by":"crossref","unstructured":"Bachrach, J., Vo, H., Richards, B., Lee, Y., Waterman, A., Avi\u017eienis, R., Wawrzynek, J., Asanovi\u0107. K.: Chisel: constructing hardware in a scala embedded language. In: Proceedings of the 49th Annual Design Automation Conference, DAC 2012, pp. 1216- 1225. ACM, New York (2012)","DOI":"10.1145\/2228360.2228584"},{"key":"42_CR2","doi-asserted-by":"crossref","unstructured":"Chung, E.S., Hoe, J.C., Mai, K.: Coram: an in-fabric memory architecture for fpga-based computing. In: Proceedings of the 19th ACM\/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2011, pp. 97\u2013106. ACM, New York (2011)","DOI":"10.1145\/1950413.1950435"},{"key":"42_CR3","unstructured":"Takamaeda-Yamazaki, S., Kise, K., Hoe, J.C.: PyCoRAM: yet another implementation of CoRAM memory architecture for modern FPGA-based computing. In: Intersections of Computer Architecture and Reconfigurable Logic (CARL 2013) (2013)"},{"key":"42_CR4","doi-asserted-by":"crossref","unstructured":"Adler, M., Fleming, K.E., Parashar, A., Pellauer, M., Emer, J.: Leap scratchpads: automatic memory and cache management for reconfigurable logic. In: Proceedings of the 19th ACM\/SIGDA International Symposium on Field Programmable Gate Arrays (2011)","DOI":"10.1145\/1950413.1950421"},{"key":"42_CR5","doi-asserted-by":"crossref","unstructured":"Duley, A., Spandikow, C., Kim, M.: A program differencing algorithm for verilog hdl. In: Proceedings of the IEEE\/ACM International Conference on Automated Software Engineering, ASE 2010, pp. 477\u2013486. ACM, New York (2010)","DOI":"10.1145\/1858996.1859093"},{"key":"42_CR6","doi-asserted-by":"crossref","unstructured":"Athavale, V., Ma, S., Hertz, S., Vasudevan, S.: Code coverage of assertions using rtl source code analysis. In: 2014 51st ACM\/EDAC\/IEEE Design Automation Conference (DAC), pp. 1\u20136, June 2014","DOI":"10.1145\/2593069.2593108"},{"key":"42_CR7","unstructured":"Icarus verilog. http:\/\/iverilog.icarus.com\/"},{"key":"42_CR8","unstructured":"Gplcver. http:\/\/gplcver.sourceforge.net\/"},{"key":"42_CR9","unstructured":"Verilator. http:\/\/www.veripool.org\/wiki\/verilator"},{"key":"42_CR10","unstructured":"Ply (python lex-yacc). http:\/\/www.dabeaz.com\/ply\/"},{"key":"42_CR11","unstructured":"Graphviz - graph visualization software. http:\/\/www.graphviz.org\/"},{"key":"42_CR12","unstructured":"Jinja. http:\/\/jinja.pocoo.org\/"},{"key":"42_CR13","doi-asserted-by":"crossref","unstructured":"Takamaeda-Yamazaki, S., Kise, K.: flipSyrup: cycle-accurate hardware simulation framework on abstract FPGA platforms. In: Proceedings of 24th International Conference on Field Programmable Logic and Applications (FPL 2014) (2014)","DOI":"10.1109\/FPL.2014.6927436"},{"key":"42_CR14","doi-asserted-by":"crossref","unstructured":"Takamaeda-Yamazaki, S., Kise, K.: A framework for efficient rapid prototyping by virtually enlarging FPGA resources. In: Proceedings of 2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig 2014) (2014)","DOI":"10.1109\/ReConFig.2014.7032488"},{"key":"42_CR15","unstructured":"pyverilog: Python package index. https:\/\/pypi.python.org\/pypi\/pyverilog"},{"key":"42_CR16","unstructured":"pycoram: Python package index. https:\/\/pypi.python.org\/pypi\/pycoram"},{"key":"42_CR17","unstructured":"flipsyrup: Python package index. https:\/\/pypi.python.org\/pypi\/flipsyrup"}],"container-title":["Lecture Notes in Computer Science","Applied Reconfigurable Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-16214-0_42","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,2,8]],"date-time":"2023-02-08T09:39:44Z","timestamp":1675849184000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-16214-0_42"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015]]},"ISBN":["9783319162133","9783319162140"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-16214-0_42","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015]]},"assertion":[{"value":"31 March 2015","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}