{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,1]],"date-time":"2025-06-01T23:40:09Z","timestamp":1748821209695,"version":"3.41.0"},"publisher-location":"Cham","reference-count":18,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319306940"},{"type":"electronic","value":"9783319306957"}],"license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016]]},"DOI":"10.1007\/978-3-319-30695-7_8","type":"book-chapter","created":{"date-parts":[[2016,3,24]],"date-time":"2016-03-24T11:17:29Z","timestamp":1458818249000},"page":"100-112","source":"Crossref","is-referenced-by-count":1,"title":["Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence"],"prefix":"10.1007","author":[{"given":"Ricardo","family":"Fern\u00e1ndez-Pascual","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alberto","family":"Ros","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Manuel E.","family":"Acacio","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"8_CR1","doi-asserted-by":"crossref","unstructured":"Agarwal, N., Krishna, T., Peh, L.S., Jha, N.K.: GARNET: a detailed on-chip network model inside a full-system simulator. In: IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pp. 33\u201342, April 2009","DOI":"10.1109\/ISPASS.2009.4919636"},{"key":"8_CR2","doi-asserted-by":"crossref","unstructured":"Alameldeen, A.R., Wood, D.A.: Variability in architectural simulations of multi-threaded workloads. In: 9th International Symposium on High-Performance Computer Architecture (HPCA), pp. 7\u201318, February 2003","DOI":"10.1109\/HPCA.2003.1183520"},{"key":"8_CR3","doi-asserted-by":"crossref","unstructured":"Bienia, C., Kumar, S., Singh, J.P., Li, K.: The PARSEC benchmark suite: characterization and architectural implications. In: 17th International Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 72\u201381, October 2008","DOI":"10.1145\/1454115.1454128"},{"key":"8_CR4","doi-asserted-by":"crossref","unstructured":"Conway, P., Kalyanasundharam, N., Donley, G., Lepak, K., Hughes, B.: Blade computing with the AMD Opteron\u2122 processor (\u201cMagny Cours\u201d). In: 21st HotChips Symposium, August 2009","DOI":"10.1109\/HOTCHIPS.2009.7478349"},{"key":"8_CR5","doi-asserted-by":"crossref","unstructured":"Cuesta, B., Ros, A., G\u00f3mez, M.E., Robles, A., Duato, J.: Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks. In: 38th International Symposium on Computer Architecture (ISCA), pp. 93\u2013103, June 2011","DOI":"10.1145\/2000064.2000076"},{"key":"8_CR6","volume-title":"Parallel Computer Architecture: a Hardware\/Software Approach","author":"DE Culler","year":"1999","unstructured":"Culler, D.E., Singh, J.P., Gupta, A.: Parallel Computer Architecture: a Hardware\/Software Approach. Morgan Kaufmann Inc., Burlington (1999)"},{"key":"8_CR7","doi-asserted-by":"crossref","unstructured":"Demetriades, S., Cho, S.: Stash directory: a scalable directory for many-core coherence. In: 20th International Symposium on High-Performance Computer Architecture (HPCA), pp. 177\u2013188, February 2014","DOI":"10.1109\/HPCA.2014.6835928"},{"key":"8_CR8","doi-asserted-by":"crossref","unstructured":"Fang, L., Liu, P., Hu, Q., Huang, M.C., Jiang, G.: Building expressive, area-efficient coherence directories. In: 22nd International Conference on Parallel Architectures and Compilation Techniques (PACT), pp. 299\u2013308, September 2013","DOI":"10.1109\/PACT.2013.6618819"},{"key":"8_CR9","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"254","DOI":"10.1007\/978-3-319-14313-2_22","volume-title":"Euro-Par 2014: Parallel Processing Workshops","author":"R Fern\u00e1ndez-Pascual","year":"2014","unstructured":"Fern\u00e1ndez-Pascual, R., Ros, A., Acacio, M.E.: Characterization of a list-based directory cache coherence protocol for manycore CMPs. In: Lopes, L., \u017dilinskas, J., Costan, A., Cascella, R.G., Kecskemeti, G., Jeannot, E., Cannataro, M., Ricci, L., Benkner, S., Petit, S., Scarano, V., Gracia, J., Hunold, S., Scott, S.L., Lankes, S., Lengauer, C., Carretero, J., Breitbart, J., Alexander, M. (eds.) Euro-Par 2014, Part II. LNCS, vol. 8806, pp. 254\u2013265. Springer, Heidelberg (2014)"},{"issue":"6","key":"8_CR10","doi-asserted-by":"publisher","first-page":"74","DOI":"10.1109\/2.55503","volume":"23","author":"D James","year":"1990","unstructured":"James, D., Laundrie, A., Gjessing, S., Sohi, G.: Scalable coherent interface. Computer 23(6), 74\u201377 (1990)","journal-title":"Computer"},{"key":"8_CR11","doi-asserted-by":"crossref","unstructured":"Lovett, T., Clapp, R.: STiNG: a CC-NUMA computer system for the commercial marketplace. In: 23rd International Symposium on Computer Architecture (ISCA), pp. 308\u2013317, June 1996","DOI":"10.1145\/232974.233006"},{"key":"8_CR12","doi-asserted-by":"crossref","unstructured":"Luk, C.K., Cohn, R., Muth, R., Patil, H., Klauser, A., Lowney, G., Wallace, S., Reddi, V.J., Hazelwood, K.: Pin: building customized program analysis tools with dynamic instrumentation. In: 2005 ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pp. 190\u2013200, June 2005","DOI":"10.1145\/1064978.1065034"},{"issue":"4","key":"8_CR13","doi-asserted-by":"publisher","first-page":"92","DOI":"10.1145\/1105734.1105747","volume":"33","author":"MM Martin","year":"2005","unstructured":"Martin, M.M., Sorin, D.J., Beckmann, B.M., Marty, M.R., Xu, M., Alameldeen, A.R., Moore, K.E., Hill, M.D., Wood, D.A.: Multifacet\u2019s general execution-driven multiprocessor simulator (GEMS) toolset. Comput. Archit. News 33(4), 92\u201399 (2005)","journal-title":"Comput. Archit. News"},{"issue":"2","key":"8_CR14","doi-asserted-by":"publisher","first-page":"10","DOI":"10.1145\/1577129.1577133","volume":"37","author":"M Monchiero","year":"2009","unstructured":"Monchiero, M., Ahn, J.H., Falc\u00f3n, A., Ortega, D., Faraboschi, P.: How to simulate 1000 cores. Comput. Archit. News 37(2), 10\u201319 (2009)","journal-title":"Comput. Archit. News"},{"key":"8_CR15","doi-asserted-by":"crossref","unstructured":"Sanchez, D., Kozyrakis, C.: SCD: a scalable coherence directory with flexible sharer set encoding. In: 18th International Symposium on High-Performance Computer Architecture (HPCA), pp. 129\u2013140, February 2012","DOI":"10.1109\/HPCA.2012.6168950"},{"issue":"6","key":"8_CR16","doi-asserted-by":"publisher","first-page":"78","DOI":"10.1109\/2.55504","volume":"23","author":"M Thapar","year":"1990","unstructured":"Thapar, M., Delagi, B.: Stanford distributed-directory protocol. Computer 23(6), 78\u201380 (1990)","journal-title":"Computer"},{"key":"8_CR17","doi-asserted-by":"crossref","unstructured":"Thekkath, R., Singh, A.P., Singh, J.P., John, S., Hennessy, J.L.: An evaluation of a commercial CC-NUMA architecture: The CONVEX Exemplar SPP1200. In: 11th International Symposium on Parallel Processing (IPPS), pp. 8\u201317, April 1997","DOI":"10.1109\/IPPS.1997.580831"},{"key":"8_CR18","doi-asserted-by":"crossref","unstructured":"Woo, S.C., Ohara, M., Torrie, E., Singh, J.P., Gupta, A.: The SPLASH-2 programs: Characterization and methodological considerations. In: 22nd International Symposium on Computer Architecture (ISCA), pp. 24\u201336, June 1995","DOI":"10.1145\/225830.223990"}],"container-title":["Lecture Notes in Computer Science","Architecture of Computing Systems \u2013 ARCS 2016"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-30695-7_8","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,1]],"date-time":"2025-06-01T23:17:53Z","timestamp":1748819873000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-30695-7_8"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016]]},"ISBN":["9783319306940","9783319306957"],"references-count":18,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-30695-7_8","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2016]]}}}