{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,3]],"date-time":"2025-06-03T04:10:02Z","timestamp":1748923802389,"version":"3.41.0"},"publisher-location":"Cham","reference-count":19,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319318530"},{"type":"electronic","value":"9783319318547"}],"license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016]]},"DOI":"10.1007\/978-3-319-31854-7_38","type":"book-chapter","created":{"date-parts":[[2016,4,30]],"date-time":"2016-04-30T14:34:17Z","timestamp":1462026857000},"page":"420-431","source":"Crossref","is-referenced-by-count":0,"title":["ISS: An Iterative Scrubbing Strategy for Improving Memory Reliability Against MBU"],"prefix":"10.1007","author":[{"given":"Hui","family":"Wang","sequence":"first","affiliation":[]},{"given":"Yun","family":"Wang","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2016,5,1]]},"reference":[{"key":"38_CR1","doi-asserted-by":"crossref","unstructured":"Georgakos, G., Huber, P., Ostermayr, M., Amirante, E., Ruckerbauer, F.: Investigation of increased multi-bit failure rate due to neutron induced seu in advanced embedded srams. In: 2007 IEEE Symposium on VLSI Circuits, pp. 80\u201381. IEEE (2007)","DOI":"10.1109\/VLSIC.2007.4342774"},{"key":"38_CR2","doi-asserted-by":"crossref","unstructured":"Seifert, N., Gill, B., Foley, K., Relangi, P.: Multi-cell upset probabilities of 45nm high-k+ metal gate sram devices in terrestrial and space environments. In: IEEE International Reliability Physics Symposium, IRPS 2008, pp. 181\u2013186. IEEE (2008)","DOI":"10.1109\/RELPHY.2008.4558882"},{"issue":"2","key":"38_CR3","doi-asserted-by":"publisher","first-page":"124","DOI":"10.1147\/rd.282.0124","volume":"28","author":"C-L Chen","year":"1984","unstructured":"Chen, C.-L., Hsiao, M.: Error-correcting codes for semiconductor memory applications: a state-of-the-art review. IBM J. Res. Dev. 28(2), 124\u2013134 (1984)","journal-title":"IBM J. Res. Dev."},{"key":"38_CR4","doi-asserted-by":"crossref","unstructured":"Cher, C.-Y., Muller, K.P., Haring, R.A., Satterfield, D.L., Musta, T.E., Gooding, T., Davis, K.D., Dombrowa, M.B., Kopcsay, G.V., Senger, R.M., et al.: Soft error resiliency characterization on ibm bluegene\/q processor. In: ASP-DAC, pp. 385\u2013387 (2014)","DOI":"10.1109\/ASPDAC.2014.6742920"},{"key":"38_CR5","doi-asserted-by":"crossref","unstructured":"Park, A., Narayanan, V., Bowman, K., Atallah, F., Artieri, A., Yoon, S.S., Yuen, K., Hansquine, D.: Exploiting error-correcting codes for cache minimum supply voltage reduction while maintaining coverage for radiation-induced soft errors. In: 2014 IEEE Proceedings of the Custom Integrated Circuits Conference (CICC), pp. 1\u20134. IEEE (2014)","DOI":"10.1109\/CICC.2014.6946033"},{"issue":"5","key":"38_CR6","doi-asserted-by":"publisher","first-page":"2483","DOI":"10.1109\/TNS.2011.2164555","volume":"58","author":"S Lee","year":"2011","unstructured":"Lee, S., Baeg, S., Reviriego, P.: Memory reliability model for accumulated and clustered soft errors. IEEE Trans. Nucl. Sci. 58(5), 2483\u20132492 (2011)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"4","key":"38_CR7","doi-asserted-by":"publisher","first-page":"592","DOI":"10.1109\/TDMR.2007.910443","volume":"7","author":"P Reviriego","year":"2007","unstructured":"Reviriego, P., Maestro, J.A., Cervantes, C.: Reliability analysis of memories suffering multiple bit upsets. IEEE Trans. Device Mater. Reliab. 7(4), 592\u2013601 (2007)","journal-title":"IEEE Trans. Device Mater. Reliab."},{"key":"38_CR8","doi-asserted-by":"crossref","unstructured":"Maniatakos, M., Michael, M.K., Makris, Y.: Vulnerability-based interleaving for multi-bit upset (mbu) protection in modern microprocessors. In: 2012 IEEE International Test Conference (ITC), pp. 1\u20138. IEEE (2012)","DOI":"10.1109\/TEST.2012.6401594"},{"issue":"4","key":"38_CR9","doi-asserted-by":"publisher","first-page":"814","DOI":"10.1109\/TCSI.2009.2025856","volume":"57","author":"S Baeg","year":"2010","unstructured":"Baeg, S., Wen, S., Wong, R.: Minimizing soft errors in tcam devices: a probabilistic approach to determining scrubbing intervals. IEEE Trans. Circ. Syst. I Regul. Pap. 57(4), 814\u2013822 (2010)","journal-title":"IEEE Trans. Circ. Syst. I Regul. Pap."},{"issue":"4","key":"38_CR10","doi-asserted-by":"publisher","first-page":"2124","DOI":"10.1109\/TNS.2010.2042818","volume":"57","author":"P Reviriego","year":"2010","unstructured":"Reviriego, P., Maestro, J.A., Baeg, S., Wen, S., Wong, R.: Protection of memories suffering mcus through the selection of the optimal interleaving distance. IEEE Trans. Nucl. Sci. 57(4), 2124\u20132128 (2010)","journal-title":"IEEE Trans. Nucl. Sci."},{"key":"38_CR11","doi-asserted-by":"crossref","unstructured":"Palframan, D.J., Kim, N.S., Lipasti, M.H.: Precision-aware soft error protection for GPUs. In: 20th International Symposium on High Performance Computer Architecture (HPCA), Proceedings, pp. 49\u201359. IEEE (2014)","DOI":"10.1109\/HPCA.2014.6835966"},{"key":"38_CR12","doi-asserted-by":"crossref","unstructured":"Mukherjee, S.S., Emer, J., Fossum, T., Reinhardt, S.K.: Cache scrubbing in microprocessors: myth or necessity? In: 10th IEEE Pacific Rim International Symposium on Dependable Computing, Proceedings, pp. 37\u201342. IEEE (2004)","DOI":"10.1109\/PRDC.2004.1276550"},{"issue":"4","key":"38_CR13","doi-asserted-by":"publisher","first-page":"2111","DOI":"10.1109\/TNS.2009.2015312","volume":"56","author":"S Baeg","year":"2009","unstructured":"Baeg, S., Wen, S., Wong, R.: Sram interleaving distance selection with a soft error failure model. IEEE Trans. Nucl. Sci. 56(4), 2111\u20132118 (2009)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"4","key":"38_CR14","first-page":"45","volume":"16","author":"JA Maestro","year":"2011","unstructured":"Maestro, J.A., Reviriego, P., Baeg, S., Wen, S., Wong, R.: Mitigating the effects of large multiple cell upsets (mcus) in memories. ACM Trans. Des. Autom. Electron. Syst. (TODAES) 16(4), 45 (2011)","journal-title":"ACM Trans. Des. Autom. Electron. Syst. (TODAES)"},{"key":"38_CR15","doi-asserted-by":"crossref","unstructured":"Dutta, A., Touba, N.A.: Multiple bit upset tolerant memory using a selective cycle avoidance based sec-ded-daec code. In: 25th IEEE VLSI Test Symposium, pp. 349\u2013354. IEEE (2007)","DOI":"10.1109\/VTS.2007.40"},{"issue":"2","key":"38_CR16","doi-asserted-by":"publisher","first-page":"192","DOI":"10.1109\/TDMR.2009.2039481","volume":"10","author":"P Reviriego","year":"2010","unstructured":"Reviriego, P., Maestro, J.A., Baeg, S.: Optimizing scrubbing sequences for advanced computer memories. IEEE Trans. Device Mater. Reliab. (T-DMR) 10(2), 192\u2013200 (2010)","journal-title":"IEEE Trans. Device Mater. Reliab. (T-DMR)"},{"issue":"6","key":"38_CR17","doi-asserted-by":"publisher","first-page":"2880","DOI":"10.1109\/TNS.2008.2006503","volume":"55","author":"AD Tipton","year":"2008","unstructured":"Tipton, A.D., Pellish, J.A., Hutson, J.M., Baumann, R., Deng, X., Marshall, A., Xapsos, M.A., Kim, H.S., Friendlich, M.R., Campola, M.J., et al.: Device-orientation effects on multiple-bit upset in 65 nm srams. IEEE Trans. Nucl. Sci. 55(6), 2880\u20132885 (2008)","journal-title":"IEEE Trans. Nucl. Sci."},{"issue":"7","key":"38_CR18","doi-asserted-by":"publisher","first-page":"1527","DOI":"10.1109\/TED.2010.2047907","volume":"57","author":"E Ibe","year":"2010","unstructured":"Ibe, E., Taniguchi, H., Yahagi, Y., Shimbo, K.-I., Toba, T.: Impact of scaling on neutron-induced soft error in srams from a 250 nm to a 22 nm design rule. IEEE Trans. Electron Devices 57(7), 1527\u20131538 (2010)","journal-title":"IEEE Trans. Electron Devices"},{"issue":"1","key":"38_CR19","doi-asserted-by":"publisher","first-page":"114","DOI":"10.1109\/24.52622","volume":"39","author":"AM Saleh","year":"1990","unstructured":"Saleh, A.M., Serrano, J.J., Patel, J.H.: Reliability of scrubbing recovery-techniques for memory systems. IEEE Trans. Reliab. 39(1), 114\u2013122 (1990)","journal-title":"IEEE Trans. Reliab."}],"container-title":["Lecture Notes in Computer Science","Human Centered Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-31854-7_38","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,2]],"date-time":"2025-06-02T23:20:45Z","timestamp":1748906445000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-31854-7_38"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016]]},"ISBN":["9783319318530","9783319318547"],"references-count":19,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-31854-7_38","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2016]]}}}