{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,11]],"date-time":"2025-06-11T04:11:50Z","timestamp":1749615110734,"version":"3.41.0"},"publisher-location":"Cham","reference-count":12,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319453774"},{"type":"electronic","value":"9783319453781"}],"license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"},{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springernature.com\/gp\/researchers\/text-and-data-mining"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016]]},"DOI":"10.1007\/978-3-319-45378-1_64","type":"book-chapter","created":{"date-parts":[[2016,9,8]],"date-time":"2016-09-08T05:04:15Z","timestamp":1473311055000},"page":"741-751","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":9,"title":["Synthesis of High-Speed Finite State Machines in FPGAs by State Splitting"],"prefix":"10.1007","author":[{"given":"Valery","family":"Salauyou","sequence":"first","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2016,9,9]]},"reference":[{"key":"64_CR1","unstructured":"Salauyou, V.V., Klimowicz, A.S.: Logic Design of Digital Systems on Programmable Logic Devices. Hot Line \u2013 Telecom, Moscow (2008). (in Russian)"},{"key":"64_CR2","doi-asserted-by":"publisher","first-page":"455","DOI":"10.1109\/92.407005","volume":"3","author":"N Miyazaki","year":"1995","unstructured":"Miyazaki, N., Nakada, H., Tsutsui, A., Yamada, K., Ohta, N.: Performance improvement technique for synchronous circuits realized as LUT-based FPGA\u2019s. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 3, 455\u2013459 (1995)","journal-title":"IEEE Trans. Very Large Scale Integr. (VLSI) Syst."},{"key":"64_CR3","doi-asserted-by":"crossref","unstructured":"Jozwiak, L., Slusarczyk, A., Chojnacki, A.: Fast and compact sequential circuits through the information-driven circuit synthesis. In: Euromicro Symposium on Digital Systems Design, pp. 46\u201353. IEEE Press, Warsaw (2001)","DOI":"10.1109\/DSD.2001.952116"},{"key":"64_CR4","doi-asserted-by":"crossref","unstructured":"Huang, S.-Y.: On speeding up extended finite state machines using catalyst circuitry. In: Asia and South Pacific Design Automation Conference (ASAP-DAC), Yokohama, pp. 583\u2013588, January 2001","DOI":"10.1145\/370155.370538"},{"key":"64_CR5","doi-asserted-by":"publisher","first-page":"23","DOI":"10.1049\/ip-cdt:20010210","volume":"1","author":"K Kuusilinna","year":"2001","unstructured":"Kuusilinna, K., Lahtinen, V., Hamalainen, T., Saarinen, J.: Finite state machine encoding for VHDL synthesis. IEEE Proc. Comput. Digit. Tech. 1, 23\u201330 (2001)","journal-title":"IEEE Proc. Comput. Digit. Tech."},{"key":"64_CR6","doi-asserted-by":"crossref","unstructured":"Rafla, N.I., Davis, B.: A study of finite state machine coding styles for implementation in FPGAs. In: 49th IEEE International Midwest Symposium on Circuits and Systems, San Juan, USA, pp. 337\u2013341 (2006)","DOI":"10.1109\/MWSCAS.2006.382066"},{"key":"64_CR7","doi-asserted-by":"crossref","unstructured":"Nedjah, N., Mourelle, L.: Evolutionary synthesis of synchronous finite state machines. In: International Conference on Computer Engineering and Systems, Cairo, Egypt, pp. 19\u201324 (2006)","DOI":"10.1109\/ICCES.2006.320419"},{"key":"64_CR8","first-page":"635","volume":"4","author":"R Czerwi\u0144ski","year":"2010","unstructured":"Czerwi\u0144ski, R., Kania, D.: Synthesis method of high speed finite state machines. Bull. Pol. Acad. Sci. Tech. Sci. 4, 635\u2013644 (2010)","journal-title":"Bull. Pol. Acad. Sci. Tech. Sci."},{"key":"64_CR9","first-page":"23:1","volume":"3","author":"J Glaser","year":"2011","unstructured":"Glaser, J., Damm, M., Haase, J., Grimm, C.: TR-FSM: Transition-based reconfigurable finite state machine. ACM Trans. Reconfig. Technol. Syst. (TRETS) 3, 23:1\u201323:14 (2011)","journal-title":"ACM Trans. Reconfig. Technol. Syst. (TRETS)"},{"key":"64_CR10","doi-asserted-by":"publisher","first-page":"2544","DOI":"10.1587\/transinf.E95.D.2544","volume":"10","author":"R Senhadji-Navarro","year":"2012","unstructured":"Senhadji-Navarro, R., Garcia-Vargas, I.: Finite virtual state machines. IEICE Trans. Inf. Syst. 10, 2544\u20132547 (2012)","journal-title":"IEICE Trans. Inf. Syst."},{"key":"64_CR11","doi-asserted-by":"publisher","first-page":"867","DOI":"10.1109\/TCAD.2015.2406859","volume":"5","author":"I Garcia-Vargas","year":"2015","unstructured":"Garcia-Vargas, I., Senhadji-Navarro, R.: Finite state machines with input multiplexing: a performance study. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 5, 867\u2013871 (2015)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circ. Syst."},{"key":"64_CR12","first-page":"777","volume":"5","author":"VV Solov\u2019ev","year":"2005","unstructured":"Solov\u2019ev, V.V.: Splitting the internal states in order to reduce the number of arguments in functions of finite automata. J. Comput. Syst. Sci. Int. 5, 777\u2013783 (2005)","journal-title":"J. Comput. Syst. Sci. Int."}],"container-title":["Lecture Notes in Computer Science","Computer Information Systems and Industrial Management"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-45378-1_64","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,10]],"date-time":"2025-06-10T17:25:29Z","timestamp":1749576329000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-45378-1_64"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016]]},"ISBN":["9783319453774","9783319453781"],"references-count":12,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-45378-1_64","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2016]]},"assertion":[{"value":"9 September 2016","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"CISIM","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"IFIP International Conference on Computer Information Systems and Industrial Management","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Vilnius","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Lithuania","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2016","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"14 September 2016","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"16 September 2016","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"15","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"cisim2016","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}