{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T00:48:28Z","timestamp":1740098908090,"version":"3.37.3"},"publisher-location":"Cham","reference-count":34,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319605876"},{"type":"electronic","value":"9783319605883"}],"license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017]]},"DOI":"10.1007\/978-3-319-60588-3_7","type":"book-chapter","created":{"date-parts":[[2017,5,29]],"date-time":"2017-05-29T08:35:27Z","timestamp":1496046927000},"page":"102-118","source":"Crossref","is-referenced-by-count":10,"title":["MC2: Multicore and Cache Analysis via Deterministic and Probabilistic Jitter Bounding"],"prefix":"10.1007","author":[{"given":"Enrique","family":"D\u00edaz","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mikel","family":"Fern\u00e1ndez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Leonidas","family":"Kosmidis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Enrico","family":"Mezzetti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Carles","family":"Hernandez","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jaume","family":"Abella","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Francisco J.","family":"Cazorla","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2017,5,30]]},"reference":[{"key":"7_CR1","doi-asserted-by":"crossref","unstructured":"Abella, J., Hernandez, C., Quinones, E., Cazorla, F.J., Conmy, P.R., Azkarate-askasua, M., Perez, J., Mezzetti, E., Vardanega, T.: WCET analysis methods: pitfalls and challenges on their trustworthiness. In: 2015 10th IEEE International Symposium on Industrial Embedded Systems (SIES), pp. 1\u201310. IEEE (2015)","DOI":"10.1109\/SIES.2015.7185039"},{"key":"7_CR2","unstructured":"Gaisler, A.: Leon3 Processor (2016). http:\/\/www.gaisler.com\/index.php\/products\/processors\/leon3"},{"key":"7_CR3","unstructured":"Buttle, D.: Real-time in the prime-time, ETAS GmbH, Germany. In: Keynote talk at 24th Euromicro Conference on Real-Time Systems, Pisa, Italy (2012)"},{"key":"7_CR4","doi-asserted-by":"crossref","unstructured":"Chattopadhyay, S., Chong, L.K., Roychoudhury, A., Kelter, T., Marwedel, P., Falk, H.: A unified WCET analysis framework for multi-core platforms. In: 2012 IEEE 18th Real Time and Embedded Technology and Applications Symposium, pp. 99\u2013108, April 2012","DOI":"10.1109\/RTAS.2012.26"},{"key":"7_CR5","doi-asserted-by":"crossref","unstructured":"Cucu-Grosjean, L., Santinelli, L., Houston, M., Lo, C., Vardanega, T., Kosmidis, L., Abella, J., Mezzetti, E., Quinones, E., Cazorla, F.J.: Measurement-based probabilistic timing analysis for multi-path programs. In: 2012 24th Euromicro Conference on Real-Time Systems (ECRTS), pp. 91\u2013101. IEEE (2012)","DOI":"10.1109\/ECRTS.2012.31"},{"key":"7_CR6","doi-asserted-by":"crossref","unstructured":"Dasari, D., Nelis, V., Akesson, B.: A framework for memory contention analysis in multi-core platforms. Real Time Syst. 52(3), 272\u2013322 (2016). http:\/\/dx.doi.org\/10.1007\/s11241-015-9229-9","DOI":"10.1007\/s11241-015-9229-9"},{"key":"7_CR7","unstructured":"Edelin, G.: Embedded systems at THALES: the Artemis challenges for an industrial group. In: Lecture at ARTIST Summer School, Autrans, France (2009)"},{"key":"7_CR8","unstructured":"Federal Aviation Administration, Certification Authorities Software Team (CAST): CAST-32A Multi-core Processors (2016)"},{"key":"7_CR9","volume-title":"An Introduction to Probability Theory and Its Applications","author":"W Feller","year":"1968","unstructured":"Feller, W.: An Introduction to Probability Theory and Its Applications. Wiley, New York (1968)"},{"key":"7_CR10","doi-asserted-by":"crossref","unstructured":"Fernandez, G., Abella, J., Quiones, E., Fossati, L., Zulianello, M., Vardanega, T., Cazorla, F.J.: Seeking time-composable partitions of tasks for cots multicore processors. In: 2015 IEEE 18th International Symposium on Real-Time Distributed Computing, pp. 208\u2013217 (2015)","DOI":"10.1109\/ISORC.2015.43"},{"key":"7_CR11","unstructured":"Fernandez, G., Abella, J., Qui\u00f1ones, E., Rochange, C., Vardanega, T., Cazorla, F.J.: Contention in multicore hardware shared resources: understanding of the state of the art. In: OASIcs-OpenAccess Series in Informatics, vol. 39. Schloss Dagstuhl-Leibniz-Zentrum fuer Informatik (2014)"},{"key":"7_CR12","doi-asserted-by":"crossref","unstructured":"Fernandez, G., Jalle, J., Abella, J., Qui\u00f1ones, E., Vardanega, T., Cazorla, F.J.: Resource usage templates and signatures for cots multicore processors. In: Proceedings of the 52nd Annual Design Automation Conference (DAC 2015) (2015)","DOI":"10.1145\/2744769.2744901"},{"key":"7_CR13","unstructured":"Fern\u00e1ndez, M., Gioiosa, R., Qui\u00f1ones, E., Fossati, L., Zulianello, M., Cazorla, F.J.: Assessing the suitability of the NGMP multi-core processor in the space domain. In: Proceedings of the Tenth ACM International Conference on Embedded Software (EMSOFT 2012), NY, USA, pp. 175\u2013184 (2012). http:\/\/doi.acm.org\/10.1145\/2380356.2380389"},{"key":"7_CR14","doi-asserted-by":"crossref","unstructured":"Hernandez, C., Abella, J., Gianarro, A., Andersson, J., Cazorla, F.J.: Random modulo: a new processor cache design for real-time critical systems. In: 2016 53rd ACM\/EDAC\/IEEE Design Automation Conference (DAC), pp. 1\u20136, June 2016","DOI":"10.1145\/2897937.2898076"},{"key":"7_CR15","unstructured":"International Organization for Standardization: ISO\/DIS 26262. Road Vehicles - Functional Safety. ISO, Geneva, Switzerland (2009)"},{"key":"7_CR16","unstructured":"Jalle, J., Fernandez, M., Abella, J., Andersson, J., Patte, M., Fossati, L., Zulianello, M., Cazorla, F.J.: Bounding resource contention interference in the next-generation microprocessor (NGMP). In: 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016) (2016)"},{"key":"7_CR17","doi-asserted-by":"crossref","unstructured":"Kosmidis, L., Quiones, E., Abella, J., Vardanega, T., Broster, I., Cazorla, F.J.: Measurement-based probabilistic timing analysis and its impact on processor architecture. In: Euromicro Conference on Digital System Design (2014)","DOI":"10.1109\/DSD.2014.50"},{"key":"7_CR18","doi-asserted-by":"crossref","unstructured":"Kosmidis, L., Vargas, R., Morales, D., Quiones, E., Abella, J., Cazorla, F.J.: TASA: toolchain-agnostic static software randomisation for critical real-time systems. In: International Conference on Computer-Aided Design, pp. 1\u20138 (2016)","DOI":"10.1145\/2966986.2967078"},{"key":"7_CR19","doi-asserted-by":"crossref","unstructured":"Kosmidis, L., Abella, J., Qui\u00f1ones, E., Cazorla, F.J.: A cache design for probabilistically analysable real-time systems. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2013) (2013)","DOI":"10.7873\/DATE.2013.116"},{"key":"7_CR20","doi-asserted-by":"crossref","unstructured":"Kosmidis, L., Curtsinger, C., Qui\u00f1ones, E., Abella, J., Berger, E., Cazorla, F.J.: Probabilistic timing analysis on conventional cache designs. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2013) (2013)","DOI":"10.7873\/DATE.2013.132"},{"key":"7_CR21","unstructured":"Kosmidis, L., Qui\u00f1ones, E., Abella, J., Farrall, G., Wartel, F., Cazorla, F.J.: Containing timing-related certification cost in automotive systems deploying complex hardware. In: Proceedings of the 51st Annual Design Automation Conference (DAC 2014), pp. 22: 1\u201322: 6, NY, USA (2014). http:\/\/doi.acm.org\/10.1145\/2593069.2593112"},{"key":"7_CR22","doi-asserted-by":"crossref","unstructured":"Law, S., Bate, I.: Achieving appropriate test coverage for reliable measurement-based timing analysis. In: 2016 28th Euromicro Conference on Real-Time Systems (ECRTS), pp. 189\u2013199, July 2016","DOI":"10.1109\/ECRTS.2016.21"},{"key":"7_CR23","doi-asserted-by":"crossref","unstructured":"Mezzetti, E., Vardanega, T.: A rapid cache-aware procedure positioning optimization to favor incremental development. In: Real-Time and Embedded Technology and Applications Symposium (RTAS), pp. 107\u2013116, April 2013","DOI":"10.1109\/RTAS.2013.6531084"},{"key":"7_CR24","doi-asserted-by":"crossref","unstructured":"Milutinovic, S., Abella, J., Cazorla, F.J.: Modelling probabilistic cache representativeness in the presence of arbitrary access patterns. In: International Symposium on Real-Time Distributed Computing (ISORC), pp. 142\u2013149, May 2016","DOI":"10.1109\/ISORC.2016.28"},{"key":"7_CR25","doi-asserted-by":"crossref","unstructured":"Nowotsch, J., Paulitsch, M., Bhler, D., Theiling, H., Wegener, S., Schmidt, M.: Multi-core interference-sensitive WCET analysis leveraging runtime resource capacity enforcement. In: Euromicro Conference on Real-Time Systems (July 2014)","DOI":"10.1109\/ECRTS.2014.20"},{"key":"7_CR26","doi-asserted-by":"crossref","unstructured":"Nowotsch, J., Paulitsch, M., Henrichsen, A., Pongratz, W., Schacht, A.: Monitoring and WCET analysis in COTS multi-core-SoC-based mixed-criticality systems. In: Conference on Design, Automation & Test in Europe (DATE) (2014)","DOI":"10.7873\/DATE.2014.080"},{"key":"7_CR27","doi-asserted-by":"crossref","unstructured":"Paolieri, M., Qui\u00f1ones, E., Cazorla, F.J., Bernat, G., Valero, M.: Hardware support for WCET analysis of hard real-time multicore systems. In: 36th Annual International Symposium on Computer Architecture (ISCA) (2009)","DOI":"10.1145\/1555754.1555764"},{"key":"7_CR28","doi-asserted-by":"crossref","unstructured":"Poovey, J.A., Conte, T.M., Levy, M., Gal-On, S.: A benchmark characterization of the eembc benchmark suite. IEEE Micro 29(5), 18\u201329 (2009). http:\/\/dx.doi.org\/10.1109\/MM.2009.74","DOI":"10.1109\/MM.2009.74"},{"key":"7_CR29","doi-asserted-by":"crossref","unstructured":"Schliecker, S., Negrean, M., Nicolescu, G., Paulin, P., Ernst, R.: Reliable performance analysis of a multicore multithreaded system-on-chip. In: 6th International Conference on Hardware\/Software Codesign and System Synthesis (CODES 2008) (2008)","DOI":"10.1145\/1450135.1450172"},{"key":"7_CR30","doi-asserted-by":"crossref","unstructured":"Schranzhofer, A., Chen, J.J., Thiele, L.: Timing analysis for TDMA arbitration in resource sharing systems. In: 16th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS) (2010)","DOI":"10.1109\/RTAS.2010.24"},{"key":"7_CR31","doi-asserted-by":"crossref","unstructured":"Wartel, F., Kosmidis, L., Lo, C., Triquet, B., Quiones, E., Abella, J., Gogonel, A., Baldovin, A., Mezzetti, E., Cucu, L., Vardanega, T., Cazorla, F.J.: Measurement-based probabilistic timing analysis: lessons from an integrated-modular avionics case study. In: International Symposium on Industrial Embedded Systems (2013)","DOI":"10.1109\/SIES.2013.6601497"},{"key":"7_CR32","unstructured":"Wartel, F., Kosmidis, L., Gogonel, A., Baldovin, A., Stephenson, Z., Triquet, B., Qui\u00f1ones, E., Lo, C., Mezzetti, E., Broster, I., Abella, J., Cucu-Grosjean, L., Vardanega, T., Cazorla, F.J.: Timing analysis of an avionics case study on complex hardware\/software platforms. In: Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, pp. 397\u2013402 (2015). http:\/\/dl.acm.org\/citation.cfm?id=2755753.2755843"},{"key":"7_CR33","unstructured":"West, A.: NASA Study on Flight Software Complexity. Final Report. Technical report, NASA Excellence Program (2009)"},{"key":"7_CR34","unstructured":"Wilhelm, R., Engblom, J., Ermedahl, A., Holsti, N., Thesing, S., Whalley, D., Bernat, G., Ferdinand, C., Heckmann, R., Mitra, T., Mueller, F., Puaut, I., Puschner, P., Staschulat, J., Stenstr\u00f6m, P.: The worst-case execution-time problem: overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst. 7(3), 36: 1\u201336: 53 (2008). http:\/\/doi.acm.org\/10.1145\/1347375.1347389"}],"container-title":["Lecture Notes in Computer Science","Reliable Software Technologies \u2013 Ada-Europe 2017"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-60588-3_7","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,25]],"date-time":"2019-09-25T02:24:48Z","timestamp":1569378288000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-60588-3_7"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"ISBN":["9783319605876","9783319605883"],"references-count":34,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-60588-3_7","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2017]]}}}