{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,22]],"date-time":"2025-06-22T01:40:01Z","timestamp":1750556401090,"version":"3.41.0"},"publisher-location":"Cham","reference-count":40,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319633893"},{"type":"electronic","value":"9783319633909"}],"license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017]]},"DOI":"10.1007\/978-3-319-63390-9_6","type":"book-chapter","created":{"date-parts":[[2017,7,12]],"date-time":"2017-07-12T08:53:50Z","timestamp":1499849630000},"page":"104-125","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":7,"title":["E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods"],"prefix":"10.1007","author":[{"given":"Eshan","family":"Singh","sequence":"first","affiliation":[]},{"given":"Clark","family":"Barrett","sequence":"additional","affiliation":[]},{"given":"Subhasish","family":"Mitra","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2017,7,13]]},"reference":[{"key":"6_CR1","volume-title":"Digital Systems Testing and Testable Design","author":"M Abramovici","year":"1990","unstructured":"Abramovici, M., Breuer, M.A., Friedman, A.D.: Digital Systems Testing and Testable Design. Computer Science Press, New York (1990)"},{"key":"6_CR2","doi-asserted-by":"crossref","unstructured":"Abramovici, M.: A reconfigurable design-for-debug infrastructure for SoCs. In: Proceedings of IEEE\/ACM Design Automation Conference, pp. 7\u201312 (2006)","DOI":"10.1109\/DAC.2006.238683"},{"key":"6_CR3","doi-asserted-by":"crossref","unstructured":"Anis, E., Nicolici, N.: On using lossless compression of debug data in embedded logic analysis. In: Proceedings of 2007 IEEE International Test Conference (ITC) (2007)","DOI":"10.1109\/TEST.2007.4437613"},{"key":"6_CR4","volume-title":"Built-in test for VLSI: Pseudorandom Techniques","author":"PH Bardell","year":"1987","unstructured":"Bardell, P.H., McAnney, W.H., Savir, J.: Built-in test for VLSI: Pseudorandom Techniques. Wiley, New York (1987)"},{"key":"6_CR5","doi-asserted-by":"crossref","unstructured":"Bayazit, A.A., Malik, S.: Complementary use of runtime validation and model checking. In: Proceedings of ICCAD-2005, IEEE\/ACM International Conference on Computer-Aided Design, pp. 1052\u20131059 (2005)","DOI":"10.1109\/ICCAD.2005.1560217"},{"key":"6_CR6","doi-asserted-by":"crossref","unstructured":"Cho, H., et al.: Understanding soft errors in uncore components. In: Proceedings of 2015 52nd ACM\/EDAC\/IEEE Design Automation Conference (DAC), pp. 1\u20136 (2015)","DOI":"10.1145\/2744769.2744923"},{"issue":"1","key":"6_CR7","doi-asserted-by":"publisher","first-page":"7","DOI":"10.1023\/A:1011276507260","volume":"19","author":"E Clarke","year":"2001","unstructured":"Clarke, E., Biere, A., Raimi, R., Zhu, Y.: Bounded model checking using satisfiability solving. Formal Methods Syst. Des. 19(1), 7\u201334 (2001)","journal-title":"Formal Methods Syst. Des."},{"key":"6_CR8","doi-asserted-by":"crossref","unstructured":"DeOrio, A., Khudia, D.S., Bertacco, V.: Post-silicon bug diagnosis with inconsistent executions. In: Proceedings of 2011 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, pp. 755\u2013761 (2011)","DOI":"10.1109\/ICCAD.2011.6105414"},{"key":"6_CR9","doi-asserted-by":"crossref","unstructured":"De Paula, F.M., et al.: BackSpace: formal analysis for post-silicon debug. In: Proceedings of International Conference on Formal Methods in Computer-Aided Design, pp. 1\u201310 (2008)","DOI":"10.1109\/FMCAD.2008.ECP.9"},{"key":"6_CR10","doi-asserted-by":"crossref","unstructured":"De Paula, F.M., et al.: TAB-BackSpace: unlimited-length trace buffers with zero additional on-chip overhead. In: Proceedings of IEEE\/ACM Design Automation Conference (2011)","DOI":"10.1145\/2024724.2024821"},{"key":"6_CR11","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"513","DOI":"10.1007\/978-3-642-31424-7_37","volume-title":"Computer Aided Verification","author":"FM De Paula","year":"2012","unstructured":"De Paula, F.M., Hu, A.J., Nahir, A.: nuTAB-BackSpace: rewriting to normalize non-determinism in post-silicon debug traces. In: Madhusudan, P., Seshia, S.A. (eds.) CAV 2012. LNCS, vol. 7358, pp. 513\u2013531. Springer, Heidelberg (2012). doi:10.1007\/978-3-642-31424-7_37"},{"issue":"1","key":"6_CR12","doi-asserted-by":"publisher","first-page":"1","DOI":"10.1147\/JRD.2014.2380272","volume":"59","author":"M Dusanapudi","year":"2015","unstructured":"Dusanapudi, M., et al.: Debugging post-silicon fails in the IBM POWER8 bring-up lab. IBM J. Res. Dev. 59(1), 1\u201310 (2015)","journal-title":"IBM J. Res. Dev."},{"key":"6_CR150","doi-asserted-by":"crossref","unstructured":"Foster, H.D.: Trends in functional verification: a 2014 industry study. In: Proceedings of IEEE\/ACM Design Automation Conference, pp. 48\u201352 (2015)","DOI":"10.1145\/2744769.2744921"},{"key":"6_CR13","doi-asserted-by":"crossref","unstructured":"Friedler, O., et al.: Effective post-silicon failure localization using dynamic program slicing. In: Proceedings of IEEE\/ACM Design Automation Test in Europe, pp. 1\u20136 (2014)","DOI":"10.7873\/DATE.2014.332"},{"key":"6_CR14","doi-asserted-by":"crossref","unstructured":"Hong, T., et al.: QED: quick error detection tests for effective post-silicon validation. In: Proceedings of IEEE International, Test Conference, pp. 1\u201310 (2010)","DOI":"10.1109\/TEST.2010.5699215"},{"key":"6_CR15","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"159","DOI":"10.1007\/BFb0031806","volume-title":"Formal Methods in Computer-Aided Design","author":"RB Jones","year":"1996","unstructured":"Jones, R.B., Seger, C.-J.H., Dill, D.L.: Self-consistency checking. In: Srivas, M., Camilleri, A. (eds.) FMCAD 1996. LNCS, vol. 1166, pp. 159\u2013171. Springer, Heidelberg (1996). doi:10.1007\/BFb0031806"},{"issue":"2","key":"6_CR16","doi-asserted-by":"publisher","first-page":"285","DOI":"10.1109\/TCAD.2008.2009158","volume":"28","author":"HF Ko","year":"2009","unstructured":"Ko, H.F., Nicolici, N.: Algorithms for state restoration and trace-signal selection for data acquisition in silicon debug. IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 28(2), 285\u2013297 (2009)","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst."},{"issue":"1","key":"6_CR17","doi-asserted-by":"publisher","first-page":"4","DOI":"10.1109\/43.108614","volume":"11","author":"T Larrabee","year":"1992","unstructured":"Larrabee, T.: Test pattern generation using Boolean satisfiability. IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst. 11(1), 4\u201315 (1992)","journal-title":"IEEE Trans. Comput.-Aided Des. Integr. Circ. Syst."},{"key":"6_CR18","doi-asserted-by":"crossref","unstructured":"Le, B., Sengupta, D., Veneris, A., Poulos, Z.: Accelerating post silicon debug of deep electrical faults. In: Proceedings of 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), Chania, pp. 61\u201366 (2013)","DOI":"10.1109\/IOLTS.2013.6604052"},{"key":"6_CR19","doi-asserted-by":"crossref","unstructured":"Li, W., Forin, A., Seshia, S.A.: Scalable specification mining for verification and diagnosis. In: Proceedings of Design Automation Conference (DAC), pp. 755\u2013760 (2010)","DOI":"10.1145\/1837274.1837466"},{"issue":"10","key":"6_CR20","doi-asserted-by":"publisher","first-page":"1573","DOI":"10.1109\/TCAD.2014.2334301","volume":"33","author":"D Lin","year":"2014","unstructured":"Lin, D., et al.: Effective post-silicon validation of system-on-chips using quick error detection. IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 33(10), 1573\u20131590 (2014)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circ. Syst."},{"key":"6_CR21","doi-asserted-by":"crossref","unstructured":"Lin, D., et al.: A structured approach to post-silicon validation and debug using symbolic quick error detection. In: Proceedings of 2015 IEEE International Test Conference (ITC), October 2015","DOI":"10.1109\/TEST.2015.7342397"},{"key":"6_CR22","doi-asserted-by":"crossref","unstructured":"Ma, S., et al.: Can\u2019t see the forest for the trees: state restoration\u2019s limitations in post-silicon trace signal selection. In: Proceedings of 2015 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1\u20138 (2015)","DOI":"10.1109\/ICCAD.2015.7372542"},{"key":"6_CR23","unstructured":"Mangassarian, H., et al.: A performance-driven QBF-based iterative logic array representation with applications to verification, debug and test. In: Proceedings of International Conference on Computer-Aided Design (ICCAD) (2007)"},{"key":"6_CR24","doi-asserted-by":"crossref","unstructured":"McLaughlin, R., Venkataraman, S., Lim, C.: Automated debug of speed path failures using functional tests. In: Proceedings of 2009 IEEE VLSI Test Symposium, pp. 91\u201396 (2009)","DOI":"10.1109\/VTS.2009.53"},{"key":"6_CR25","doi-asserted-by":"crossref","unstructured":"Mishra, P., Morad, R., Ziv, A., Ray, S.: Post-silicon validation in the SoC era: a tutorial introduction. In: IEEE Design & Test, April 2017","DOI":"10.1109\/MDAT.2017.2691348"},{"key":"6_CR151","doi-asserted-by":"crossref","unstructured":"Nahir, A., et al.: Post-silicon validation of the IBM POWER8 processor. In: Proceedings of IEEE\/ACM Design Automation Conference, pp. 1\u20136 (2014)","DOI":"10.1145\/2593069.2593183"},{"key":"6_CR26","unstructured":"OpenSPARC: World\u2019s First Free 64-bit Microprocessor. http:\/\/www.opensparc.net"},{"issue":"10","key":"6_CR27","doi-asserted-by":"publisher","first-page":"1545","DOI":"10.1109\/TCAD.2009.2030595","volume":"28","author":"S-B Park","year":"2009","unstructured":"Park, S.-B., Hong, T., Mitra, S.: Post-silicon bug localization in processors using instruction footprint recording and analysis (IFRA). IEEE Trans. Comput. Aided Des. Integr. Circ. Syst. 28(10), 1545\u20131558 (2009)","journal-title":"IEEE Trans. Comput. Aided Des. Integr. Circ. Syst."},{"key":"6_CR28","doi-asserted-by":"crossref","unstructured":"Park, S.-B., et al.: BLoG: post-silicon bug localization in processors using bug localization graph. In: Proceedings of IEEE\/ACM Design Automation Conference, pp. 368\u2013373 (2010)","DOI":"10.1145\/1837274.1837367"},{"key":"6_CR29","unstructured":"Reick, K.: Post-silicon debug \u2013 DAC workshop on post-silicon debug: technologies, methodologies, and best-practices. In: Proceedings of IEEE\/ACM Design Automation Conference (2012)"},{"issue":"3","key":"6_CR30","doi-asserted-by":"publisher","first-page":"275","DOI":"10.1147\/rd.523.0275","volume":"52","author":"PN Sanda","year":"2008","unstructured":"Sanda, P.N., et al.: Soft-error resilience of the IBM POWER6 processor. IBM J. Res. Dev. 52(3), 275\u2013284 (2008)","journal-title":"IBM J. Res. Dev."},{"issue":"4","key":"6_CR31","doi-asserted-by":"publisher","first-page":"425","DOI":"10.1109\/12.588057","volume":"46","author":"NR Saxena","year":"1997","unstructured":"Saxena, N.R., McCluskey, E.J.: Parallel signature analysis design with bounds on aliasing. IEEE Trans. Comput. 46(4), 425\u2013438 (1997)","journal-title":"IEEE Trans. Comput."},{"key":"6_CR32","doi-asserted-by":"crossref","unstructured":"Sengupta, D., et al.: Lazy suspect-set computation: fault diagnosis for deep electrical bugs. In: Proceedings of the Great Lakes Symposium on VLSI. ACM (2012)","DOI":"10.1145\/2206781.2206827"},{"key":"6_CR33","doi-asserted-by":"crossref","unstructured":"Singh, E., Barrett, C., Mitra, S.: E-QED: electrical bug localization during post-silicon validation enabled by quick error detection and formal methods, arXiv:1705.0125 [cs.OH] (2017)","DOI":"10.1007\/978-3-319-63390-9_6"},{"key":"6_CR34","doi-asserted-by":"crossref","unstructured":"Vali, A., Nicolici, N.: Bit-flip detection-driven selection of trace signals. In: Proceedings of 2016 21th IEEE European Test Symposium (ETS), Amsterdam, pp. 1\u20136 (2016)","DOI":"10.1109\/ETS.2016.7519315"},{"key":"6_CR35","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-06242-6","volume-title":"Debugging Systems-on-Chip: Communication-Centric and Abstraction Based Techniques","author":"B Vermeulen","year":"2014","unstructured":"Vermeulen, B., Goossens, K.: Debugging Systems-on-Chip: Communication-Centric and Abstraction Based Techniques. Springer, Heidelberg (2014)"},{"key":"6_CR36","doi-asserted-by":"crossref","unstructured":"Woo, S.C., et al.: The SPLASH-2 programs: characterization and methodological considerations. In: Proceedings of International Symposium on Computer Architecture (1995)","DOI":"10.1145\/223982.223990"},{"key":"6_CR37","unstructured":"Zhu, C.S., Weissenbacher, G., Malik, S.: Post-silicon fault localisation using maximum satisfiability and backbones. In: Proceedings of IEEE\/ACM Formal Methods Computer-Aided Design, pp. 63\u201366 (2011)"},{"key":"6_CR38","doi-asserted-by":"crossref","unstructured":"Zhu, C.S., Weissenbacher, G., Malik, S.: Silicon fault diagnosis using sequence interpolation with backbones. In: Proceedings of 2014 IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA (2014)","DOI":"10.1109\/ICCAD.2014.7001373"}],"container-title":["Lecture Notes in Computer Science","Computer Aided Verification"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-63390-9_6","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,22]],"date-time":"2025-06-22T01:06:37Z","timestamp":1750554397000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-63390-9_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"ISBN":["9783319633893","9783319633909"],"references-count":40,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-63390-9_6","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2017]]},"assertion":[{"value":"13 July 2017","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"CAV","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"International Conference on Computer Aided Verification","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Heidelberg","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Germany","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2017","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"24 July 2017","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"28 July 2017","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"30","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"cav2017","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/cavconference.org\/2017\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}