{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,19]],"date-time":"2026-06-19T15:27:25Z","timestamp":1781882845537,"version":"3.54.5"},"publisher-location":"Cham","reference-count":16,"publisher":"Springer International Publishing","isbn-type":[{"value":"9783319642024","type":"print"},{"value":"9783319642031","type":"electronic"}],"license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017]]},"DOI":"10.1007\/978-3-319-64203-1_51","type":"book-chapter","created":{"date-parts":[[2017,7,31]],"date-time":"2017-07-31T15:03:35Z","timestamp":1501513415000},"page":"710-722","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":4,"title":["To Distribute or Not to Distribute: The Question of Load Balancing for\u00a0Performance or Energy"],"prefix":"10.1007","author":[{"given":"Esteban","family":"Stafford","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Borja","family":"P\u00e9rez","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jose Luis","family":"Bosque","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ram\u00f3n","family":"Beivide","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mateo","family":"Valero","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"297","published-online":{"date-parts":[[2017,8,1]]},"reference":[{"key":"51_CR1","unstructured":"AMD Accelerated Parallel Processing (APP) Software Development Kit (SDK) V3. http:\/\/developer.amd.com\/tools-and-sdks\/opencl-zone\/amd-accelerated-parallel-processing-app-sdk\/. Accessed November 2016"},{"key":"51_CR2","doi-asserted-by":"crossref","unstructured":"Binotto, A., Pereira, C., Fellner, D.: Towards dynamic reconfigurable load-balancing for hybrid desktop platforms. In: Proceedings of IPDPS, pp. 1\u20134. IEEE Computer Society, April 2010","DOI":"10.1109\/IPDPSW.2010.5470804"},{"key":"51_CR3","doi-asserted-by":"crossref","unstructured":"Boyer, M., Skadron, K., Che, S., Jayasena, N.: Load balancing in a changing world: dealing with heterogeneity and performance variability. In: Proceedings of the ACM International Conference on Computing Frontiers, pp. 21:1\u201321:10 (2013)","DOI":"10.1145\/2482767.2482794"},{"issue":"2","key":"51_CR4","doi-asserted-by":"publisher","first-page":"729","DOI":"10.1007\/s11227-014-1316-5","volume":"71","author":"E Castillo","year":"2015","unstructured":"Castillo, E., Camarero, C., Borrego, A., Bosque, J.L.: Financial applications on multi-CPU and multi-GPU architectures. J. Supercomput. 71(2), 729\u2013739 (2015)","journal-title":"J. Supercomput."},{"issue":"3","key":"51_CR5","doi-asserted-by":"publisher","first-page":"280","DOI":"10.1145\/1816038.1815998","volume":"38","author":"S Hong","year":"2010","unstructured":"Hong, S., Kim, H.: An integrated GPU power and performance model. SIGARCH Comput. Archit. News 38(3), 280\u2013289 (2010)","journal-title":"SIGARCH Comput. Archit. News"},{"key":"51_CR6","doi-asserted-by":"crossref","unstructured":"Kaleem, R., Barik, R., Shpeisman, T., Lewis, B.T., Hu, C., Pingali, K.: Adaptive heterogeneous scheduling for integrated GPUs. In: Proceedings of PACT. ACM (2014)","DOI":"10.1145\/2628071.2628088"},{"key":"51_CR7","doi-asserted-by":"crossref","unstructured":"de la Lama, C.S., Toharia, P., Bosque, J.L., Robles, O.D.: Static multi-device load balancing for OpenCL. In: Proceedings of ISPA, pp. 675\u2013682. IEEE Computer Society (2012)","DOI":"10.1109\/ISPA.2012.100"},{"key":"51_CR8","doi-asserted-by":"crossref","unstructured":"Lee, J., Samadi, M., Park, Y., Mahlke, S.: Transparent CPU-GPU collaboration for data-parallel kernels on heterogeneous systems. In: Proceedings of PACT, pp. 245\u2013256. IEEE Press, Piscataway (2013)","DOI":"10.1109\/PACT.2013.6618814"},{"key":"51_CR9","doi-asserted-by":"crossref","unstructured":"Ma, K., Li, X., Chen, W., Zhang, C., Wang, X.: GreenGPU: a holistic approach to energy efficiency in GPU-CPU heterogeneous architectures. In: 41st International Conference on Parallel Processing, ICPP (2012)","DOI":"10.1109\/ICPP.2012.31"},{"issue":"2","key":"51_CR10","doi-asserted-by":"publisher","first-page":"19:1","DOI":"10.1145\/2636342","volume":"47","author":"S Mittal","year":"2014","unstructured":"Mittal, S., Vetter, J.S.: A survey of methods for analyzing and improving GPU energy efficiency. ACM Comput. Surv. 47(2), 19:1\u201319:23 (2014)","journal-title":"ACM Comput. Surv."},{"key":"51_CR11","unstructured":"NVIDIA: NVIDIA Management Library (NVML). https:\/\/developer.nvidia.com\/nvidia-management-library-nvml. Accessed April 2016"},{"key":"51_CR12","doi-asserted-by":"crossref","unstructured":"P\u00e9rez, B., Bosque, J.L., Beivide, R.: Simplifying programming and load balancing of data parallel applications on heterogeneous systems. In: Proceedings of the 9th Workshop on General Purpose Processing using GPU, pp. 42\u201351 (2016)","DOI":"10.1145\/2884045.2884051"},{"issue":"1","key":"51_CR13","doi-asserted-by":"publisher","first-page":"330","DOI":"10.1007\/s11227-016-1864-y","volume":"73","author":"B P\u00e9rez","year":"2017","unstructured":"P\u00e9rez, B., Stafford, E., Bosque, J.L., Beivide, R.: Energy efficiency of load balancing for data-parallel applications in heterogeneous systems. J. Supercomput. 73(1), 330\u2013342 (2017)","journal-title":"J. Supercomput."},{"key":"51_CR14","doi-asserted-by":"crossref","unstructured":"Rotem, E., Naveh, A., Rajwan, D., Ananthakrishnan, A., Weissmann, E.: Power management architecture of the 2nd generation Intel Core microarchitecture, formerly codenamed Sandy Bridge. In: IEEE International Symposium on High-Performance Chips (2011)","DOI":"10.1109\/HOTCHIPS.2011.7477510"},{"key":"51_CR15","doi-asserted-by":"crossref","unstructured":"Wang, G., Ren, X.: Power-efficient work distribution method for CPU-GPU heterogeneous system. In: International Symposium on Parallel and Distributed Processing with Applications, pp. 122\u2013129, September 2010","DOI":"10.1109\/ISPA.2010.22"},{"issue":"3","key":"51_CR16","doi-asserted-by":"publisher","first-page":"905","DOI":"10.1109\/TPDS.2016.2586074","volume":"28","author":"F Zhang","year":"2017","unstructured":"Zhang, F., Zhai, J., He, B., Zhang, S., Chen, W.: Understanding co-running behaviors on integrated CPU\/GPU architectures. IEEE Trans. Parallel Distrib. Syst. 28(3), 905\u2013918 (2017)","journal-title":"IEEE Trans. Parallel Distrib. Syst."}],"container-title":["Lecture Notes in Computer Science","Euro-Par 2017: Parallel Processing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-64203-1_51","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,24]],"date-time":"2025-06-24T19:08:47Z","timestamp":1750792127000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-64203-1_51"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"ISBN":["9783319642024","9783319642031"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-64203-1_51","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"value":"0302-9743","type":"print"},{"value":"1611-3349","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017]]},"assertion":[{"value":"1 August 2017","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"Euro-Par","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"European Conference on Parallel Processing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Santiago de Compostela","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Spain","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2017","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"28 August 2017","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"1 September 2017","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"23","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"europar2017","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/europar2017.usc.es","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}