{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,26]],"date-time":"2025-06-26T04:09:21Z","timestamp":1750910961431,"version":"3.41.0"},"publisher-location":"Cham","reference-count":8,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319682099"},{"type":"electronic","value":"9783319682105"}],"license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"tdm","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017]]},"DOI":"10.1007\/978-3-319-68210-5_11","type":"book-chapter","created":{"date-parts":[[2017,9,18]],"date-time":"2017-09-18T05:58:09Z","timestamp":1505714289000},"page":"118-121","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["An Efficient Polarity Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Novel Binary Differential Evolution Algorithm"],"prefix":"10.1007","author":[{"given":"Zhenxue","family":"He","sequence":"first","affiliation":[]},{"given":"Guangjun","family":"Qin","sequence":"additional","affiliation":[]},{"given":"Limin","family":"Xiao","sequence":"additional","affiliation":[]},{"given":"Fei","family":"Gu","sequence":"additional","affiliation":[]},{"given":"Zhisheng","family":"Huo","sequence":"additional","affiliation":[]},{"given":"Li","family":"Ruan","sequence":"additional","affiliation":[]},{"given":"Haitao","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Longbing","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Jianbin","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Shaobo","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Xiang","family":"Wang","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2017,9,19]]},"reference":[{"issue":"2","key":"11_CR1","doi-asserted-by":"publisher","first-page":"297","DOI":"10.1007\/s11390-017-1723-1","volume":"32","author":"ZX He","year":"2017","unstructured":"He, Z.X., Xiao, L.M., Ruan, L.: A power and area optimization approach for mixed polarity reed-muller expressions for incompletely specified boolean functions. J. Comput. Sci. Technol. 32(2), 297\u2013311 (2017)","journal-title":"J. Comput. Sci. Technol."},{"issue":"3","key":"11_CR2","first-page":"509","volume":"29","author":"XJ Ma","year":"2017","unstructured":"Ma, X.J., Li, Q.Y., Zhang, J.L., Xia, Y.S.: Power optimization technique based on dual-logic diagram expression at gate level. J. Comput. Aided. Des. Comput. Graph. 29(3), 509\u2013518 (2017)","journal-title":"J. Comput. Aided. Des. Comput. Graph."},{"key":"11_CR3","doi-asserted-by":"crossref","unstructured":"He, Z.X., Xiao, L.M., Gu, F.: An efficient and fast polarity optimization approach for mixed polarity reed-muller logic circuits. frontiers of computer science, pp. 1\u201315 (2017)","DOI":"10.1007\/978-3-319-68210-5_11"},{"issue":"5","key":"11_CR4","doi-asserted-by":"publisher","first-page":"581","DOI":"10.1093\/comjnl\/bxp048","volume":"53","author":"H Rahaman","year":"2010","unstructured":"Rahaman, H., Mathew, J., Pradhan, D.K.: Secure testable s-box architecture for cryptographic hardware implementation. Comput. J. 53(5), 581\u2013591 (2010)","journal-title":"Comput. J."},{"issue":"8","key":"11_CR5","first-page":"1542","volume":"41","author":"PJ Wang","year":"2013","unstructured":"Wang, P.J., Wang, D.S., Jiang, Z.D.: Area and power optimization of ISFPRM circuits based on PSGA algorithm. ACTA ELECTRONICA SINICA 41(8), 1542\u20131548 (2013)","journal-title":"ACTA ELECTRONICA SINICA"},{"key":"11_CR6","doi-asserted-by":"crossref","unstructured":"He, Z.X., Xiao, L.M., Zhang L.B.: EMA-FPRMs: an efficient minimization algorithm for fixed polarity reed-muller expressions. In: International Conference on Field-Programmable Technology, pp. 253\u2013256 (2016)","DOI":"10.1109\/FPT.2016.7929546"},{"issue":"5","key":"11_CR7","first-page":"51","volume":"48","author":"F Sun","year":"2013","unstructured":"Sun, F., Wang, P.J., Yu, H.Z.: Ternary FPRM circuit area optimization based on genetic algorithm. J. Shandong Univ. (Nat.l Sci.) 48(5), 51\u201356 (2013)","journal-title":"J. Shandong Univ. (Nat.l Sci.)"},{"issue":"3","key":"11_CR8","first-page":"303","volume":"52","author":"M Yang","year":"2013","unstructured":"Yang, M., Almaini, A.E.A.: Optimization of mixed polarity reed-muller functions based on whole annealing genetic algorithm. J. Fudan Univ. (Nat. Sci.) 52(3), 303\u2013308 (2013)","journal-title":"J. Fudan Univ. (Nat. Sci.)"}],"container-title":["Lecture Notes in Computer Science","Network and Parallel Computing"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-68210-5_11","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,25]],"date-time":"2025-06-25T19:45:45Z","timestamp":1750880745000},"score":1,"resource":{"primary":{"URL":"https:\/\/link.springer.com\/10.1007\/978-3-319-68210-5_11"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017]]},"ISBN":["9783319682099","9783319682105"],"references-count":8,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-68210-5_11","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2017]]},"assertion":[{"value":"19 September 2017","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}},{"value":"NPC","order":1,"name":"conference_acronym","label":"Conference Acronym","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"IFIP International Conference on Network and Parallel Computing","order":2,"name":"conference_name","label":"Conference Name","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"Hefei","order":3,"name":"conference_city","label":"Conference City","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"China","order":4,"name":"conference_country","label":"Conference Country","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"2017","order":5,"name":"conference_year","label":"Conference Year","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"20 October 2017","order":7,"name":"conference_start_date","label":"Conference Start Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"21 October 2017","order":8,"name":"conference_end_date","label":"Conference End Date","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"14","order":9,"name":"conference_number","label":"Conference Number","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"npc2017","order":10,"name":"conference_id","label":"Conference ID","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"http:\/\/npc-china2017.org\/","order":11,"name":"conference_url","label":"Conference URL","group":{"name":"ConferenceInfo","label":"Conference Information"}},{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}