{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,29]],"date-time":"2025-06-29T08:10:01Z","timestamp":1751184601953,"version":"3.41.0"},"publisher-location":"Cham","reference-count":17,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319733524"},{"type":"electronic","value":"9783319733531"}],"license":[{"start":{"date-parts":[[2017,12,28]],"date-time":"2017-12-28T00:00:00Z","timestamp":1514419200000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"DOI":"10.1007\/978-3-319-73353-1_9","type":"book-chapter","created":{"date-parts":[[2017,12,27]],"date-time":"2017-12-27T10:45:34Z","timestamp":1514371534000},"page":"125-138","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Benchmarking Performance: Influence of Task Location on Cluster Throughput"],"prefix":"10.1007","author":[{"given":"Manuel","family":"Rodr\u00edguez-Pascual","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jos\u00e9 Antonio","family":"Mor\u00ed\u00f1igo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rafael","family":"Mayo-Garc\u00eda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2017,12,28]]},"reference":[{"key":"9_CR1","unstructured":"Top 500. www.top500.org"},{"issue":"4","key":"9_CR2","doi-asserted-by":"crossref","first-page":"993","DOI":"10.1109\/TPDS.2013.104","volume":"25","author":"E Jeannot","year":"2014","unstructured":"Jeannot, E., Mercier, G., Tessier, F.: Process placement in multicore clusters: algorithmic issues and practical techniques. IEEE Trans. Parallel Distrib. Syst. 25(4), 993\u20131002 (2014)","journal-title":"IEEE Trans. Parallel Distrib. Syst."},{"key":"9_CR3","doi-asserted-by":"crossref","unstructured":"Chavarr\u00eda-Miranda, D., Nieplocha, J., Tipparaju, V.: Topology-aware tile mapping for clusters of SMPs. In: Proceedings of the 3rd Conference on Computing Frontiers (CF 2006), pp. 383\u2013392. ACM (2006)","DOI":"10.1145\/1128022.1128073"},{"key":"9_CR4","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"1005","DOI":"10.1007\/11549468_110","volume-title":"Euro-Par 2005 Parallel Processing","author":"BE Smith","year":"2005","unstructured":"Smith, B.E., Bode, B.: Performance effects of node mappings on the IBM BlueGene\/L machine. In: Cunha, J.C., Medeiros, P.D. (eds.) Euro-Par 2005. LNCS, vol. 3648, pp. 1005\u20131013. Springer, Heidelberg (2005). https:\/\/doi.org\/10.1007\/11549468_110"},{"key":"9_CR5","doi-asserted-by":"crossref","unstructured":"Rodrigues, E.R., Madruga, F.L., Navaux, P.O.A., Panetta, J.: Multi-core aware process mapping and its impact on communication overhead of parallel applications. In: Proceedings of the IEEE Symposium on Computers and Communications, pp. 811\u2013817 (2009)","DOI":"10.1109\/ISCC.2009.5202271"},{"key":"9_CR6","doi-asserted-by":"crossref","unstructured":"Chai, L., Gao, Q., Panda, D.K.: Understanding the impact of multi-core architecture in cluster computing: a case study with Intel dual-core system. In: Proceedings of the 7th IEEE International Symposium on Cluster Computing and the Grid, CCGrid, pp. 471\u2013478 (2007)","DOI":"10.1109\/CCGRID.2007.119"},{"key":"9_CR7","doi-asserted-by":"crossref","unstructured":"Shainer, G., Lui, P., Liu, T., Wilde, T., Layton, J.: The impact of inter-node latency versus intra-node latency on HPC applications. In: Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, pp. 455\u2013460 (2011)","DOI":"10.2316\/P.2011.757-005"},{"key":"9_CR8","unstructured":"Xingfu, W., Taylor, V.: Using processor partitioning to evaluate the performance of MPI, OpenMP and hybrid parallel applications on dual- and quad-core Cray XT4 systems. In: Cray UG Proceedings (CUG 2009), Atlanta, USA, pp. 4\u20137 (2009)"},{"issue":"1","key":"9_CR9","first-page":"79","volume":"7","author":"CP Ribeiro","year":"2012","unstructured":"Ribeiro, C.P., et al.: Evaluating CPU and memory affinity for numerical scientific multithreaded benchmarks on multi-cores. IJCSIS 7(1), 79\u201393 (2012)","journal-title":"IJCSIS"},{"key":"9_CR10","unstructured":"Wu, X., Taylor, V.: Processor partitioning: an experimental performance analysis of parallel applications on SMP clusters systems. In: 19th International Conference on Parallel Distributed Computing and Systems (PDCS 2007), CA, USA, pp. 13\u201318 (2007)"},{"issue":"8","key":"9_CR11","doi-asserted-by":"crossref","first-page":"1256","DOI":"10.1016\/j.jcss.2013.02.005","volume":"79","author":"X Wu","year":"2013","unstructured":"Wu, X., Taylor, V.: Performance modeling of hybrid MPI\/OpenMP scientific applications on large-scale multicore. J. Comput. Syst. Sci. 79(8), 1256\u20131268 (2013)","journal-title":"J. Comput. Syst. Sci."},{"key":"9_CR12","doi-asserted-by":"crossref","unstructured":"Zhang, C., Yuan, X., Srinivasan, A.: Processor affinity and MPI performance on SMP-CMP clusters. In: IEEE International Symposium on Parallel & Distributed Processing, Workshops and Ph.D. Forum (IPDPSW), Atlanta, USA, pp. 1\u20138 (2010)","DOI":"10.1109\/IPDPSW.2010.5470774"},{"key":"9_CR13","unstructured":"McCalpin, J.D.: Memory bandwidth and machine balance in current high performance computers. In: IEEE Computer Society Technical Committee on Computer Architecture (TCCA) Newsletter, pp. 19\u201325 (1995)"},{"key":"9_CR14","unstructured":"OSU Micro-Benchmarks. http:\/\/mvapich.cse.ohio-state.edu\/benchmarks"},{"key":"9_CR15","unstructured":"Bonnie++. www.coker.com.au\/bonnie++"},{"key":"9_CR16","unstructured":"Intel Memory Latency Checker 3.1. www.intel.com\/software\/mlc"},{"key":"9_CR17","unstructured":"Bailey, D., et al.: The NAS parallel benchmarks. Technical report (1994)"}],"container-title":["Communications in Computer and Information Science","High Performance Computing"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-73353-1_9","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,29]],"date-time":"2025-06-29T07:41:09Z","timestamp":1751182869000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-73353-1_9"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,12,28]]},"ISBN":["9783319733524","9783319733531"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-73353-1_9","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2017,12,28]]}}}