{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T00:50:25Z","timestamp":1740099025860,"version":"3.37.3"},"publisher-location":"Cham","reference-count":20,"publisher":"Springer International Publishing","isbn-type":[{"type":"print","value":"9783319752136"},{"type":"electronic","value":"9783319752143"}],"license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018]]},"DOI":"10.1007\/978-3-319-75214-3_5","type":"book-chapter","created":{"date-parts":[[2018,1,25]],"date-time":"2018-01-25T09:33:29Z","timestamp":1516872809000},"page":"47-57","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Blocked All-Pairs Shortest Paths Algorithm on Intel Xeon Phi KNL Processor: A Case Study"],"prefix":"10.1007","author":[{"given":"Enzo","family":"Rucci","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Armando","family":"De Giusti","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marcelo","family":"Naiouf","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","published-online":{"date-parts":[[2018,1,26]]},"reference":[{"key":"5_CR1","unstructured":"Green500 Supercomputer Ranking. https:\/\/www.green500.org\/"},{"key":"5_CR2","unstructured":"Top500 Supercomputer Ranking. https:\/\/www.top500.org\/"},{"key":"5_CR3","doi-asserted-by":"crossref","unstructured":"Barnes, T., et al.: Evaluating and optimizing the NERSC workload on knights landing. In: Proceedings of the 7th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computing Systems, PMBS 2016, Piscataway, NJ, USA, pp. 43\u201353. IEEE Press (2016)","DOI":"10.1109\/PMBS.2016.010"},{"key":"5_CR4","doi-asserted-by":"crossref","unstructured":"Bondhugula, U., Devulapalli, A., Dinan, J., Fernando, J., Wyckoff, P., Stahlberg, E., Sadayappan, P.: Hardware\/software integration for FPGA-based all-pairs shortest-paths. In: 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp. 152\u2013164, April 2006","DOI":"10.1109\/FCCM.2006.48"},{"key":"5_CR5","unstructured":"Codreanu, V., Rodrguez, J., Saastad, O.W.: Best Practice Guide - Knights Landing (2017). http:\/\/www.prace-ri.eu\/IMG\/pdf\/Best-Practice-Guide-Knights-Landing.pdf"},{"key":"5_CR6","volume-title":"Parallel Computer Architecture: A Hardware\/Software Approach","author":"DE Culler","year":"1997","unstructured":"Culler, D.E., Gupta, A., Singh, J.P.: Parallel Computer Architecture: A Hardware\/Software Approach, 1st edn. Morgan Kaufmann Publishers Inc., San Francisco (1997)","edition":"1"},{"issue":"6","key":"5_CR7","doi-asserted-by":"crossref","first-page":"345","DOI":"10.1145\/367766.368168","volume":"5","author":"RW Floyd","year":"1962","unstructured":"Floyd, R.W.: Algorithm 97: shortest path. Commun. ACM 5(6), 345 (1962)","journal-title":"Commun. ACM"},{"issue":"2022","key":"5_CR8","first-page":"1","volume":"372","author":"MB Giles","year":"2014","unstructured":"Giles, M.B., Reguly, I.: Trends in high-performance computing for engineering calculations. Philos. Trans. R. Soc. Lond. Math. Phys. Eng. Sci. 372(2022), 1\u201314 (2014)","journal-title":"Philos. Trans. R. Soc. Lond. Math. Phys. Eng. Sci."},{"key":"5_CR9","doi-asserted-by":"crossref","unstructured":"Haidar, A., Tomov, S., Arturov, K., Guney, M., Story, S., Dongarra, J.: LU, QR, and Cholesky factorizations: programming model, performance analysis and optimization techniques for the Intel Knights Landing Xeon Phi. In: 2016 IEEE High Performance Extreme Computing Conference (HPEC), pp. 1\u20137, September 2016","DOI":"10.1109\/HPEC.2016.7761591"},{"key":"5_CR10","unstructured":"Han, S., Kang, S.: Optimizing all-pairs shortest-path algorithm using vector instructions (2005)"},{"key":"5_CR11","doi-asserted-by":"crossref","unstructured":"Hou, K., Wang, H., Feng, W.: Delivering parallel programmability to the masses via the Intel MIC ecosystem: a case study. In: 2014 43rd International Conference on Parallel Processing Workshops, pp. 273\u2013282, September 2014","DOI":"10.1109\/ICPPW.2014.44"},{"issue":"8","key":"5_CR12","doi-asserted-by":"crossref","first-page":"1077","DOI":"10.1016\/j.ssci.2009.01.001","volume":"47","author":"S Jalali","year":"2009","unstructured":"Jalali, S., Noroozi, M.: Determination of the optimal escape routes of underground mine networks in emergency cases. Saf. Sci. 47(8), 1077\u20131082 (2009)","journal-title":"Saf. Sci."},{"key":"5_CR13","unstructured":"Katz, G.J., Kider Jr., J.T.: All-pairs shortest-paths for large graphs on the GPU. In: Proceedings of the 23rd ACM SIGGRAPH\/EUROGRAPHICS Symposium on Graphics Hardware, GH 2008, pp. 47\u201355. Eurographics Association, Aire-la-Ville (2008)"},{"key":"5_CR14","doi-asserted-by":"crossref","unstructured":"Khan, P., Konar, G., Chakraborty, N.: Modification of Floyd-Warshall\u2019s algorithm for shortest path routing in wireless sensor networks. In: 2014 Annual IEEE India Conference (INDICON), pp. 1\u20136, December 2014","DOI":"10.1109\/POWERI.2014.7117603"},{"key":"5_CR15","doi-asserted-by":"crossref","unstructured":"Matsumoto, K., Nakasato, N., Sedukhin, S.G.: Blocked all-pairs shortest paths algorithm for hybrid cpu-gpu system. In: 2011 IEEE International Conference on High Performance Computing and Communications, pp. 145\u2013152, September 2011","DOI":"10.1109\/HPCC.2011.28"},{"key":"5_CR16","first-page":"44","volume":"12","author":"A Nakaya","year":"2001","unstructured":"Nakaya, A., Goto, S., Kanehisa, M.: Extraction of correlated gene clusters by multiple graph comparison. Genome Inform. 12, 44\u201353 (2001)","journal-title":"Genome Inform."},{"key":"5_CR17","volume-title":"Intel Xeon Phi Processor High Performance Programming Knights Landing Edition","author":"J Reinders","year":"2016","unstructured":"Reinders, J., Jeffers, J., Sodani, A.: Intel Xeon Phi Processor High Performance Programming Knights Landing Edition. Morgan Kaufmann Publishers Inc., Boston (2016)"},{"key":"5_CR18","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"307","DOI":"10.1007\/978-3-319-46079-6_22","volume-title":"High Performance Computing","author":"C Rosales","year":"2016","unstructured":"Rosales, C., Cazes, J., Milfeld, K., G\u00f3mez-Iglesias, A., Koesterke, L., Huang, L., Vienne, J.: A comparative study of application performance and scalability on the intel knights landing processor. In: Taufer, M., Mohr, B., Kunkel, J.M. (eds.) ISC High Performance 2016. LNCS, vol. 9945, pp. 307\u2013318. Springer, Cham (2016). https:\/\/doi.org\/10.1007\/978-3-319-46079-6_22"},{"key":"5_CR19","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"419","DOI":"10.1007\/3-540-44985-X_36","volume-title":"Algorithm Theory - SWAT 2000","author":"G Venkataraman","year":"2000","unstructured":"Venkataraman, G., Sahni, S., Mukhopadhyaya, S.: A blocked all-pairs shortest-paths algorithm. In: Halld\u00f3rsson, M.M. (ed.) SWAT 2000. LNCS, vol. 1851, pp. 419\u2013432. Springer, Heidelberg (2000). https:\/\/doi.org\/10.1007\/3-540-44985-X_36"},{"issue":"1","key":"5_CR20","doi-asserted-by":"crossref","first-page":"11","DOI":"10.1145\/321105.321107","volume":"9","author":"S Warshall","year":"1962","unstructured":"Warshall, S.: A theorem on boolean matrices. J. ACM 9(1), 11\u201312 (1962)","journal-title":"J. ACM"}],"container-title":["Communications in Computer and Information Science","Computer Science \u2013 CACIC 2017"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-319-75214-3_5","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,10,9]],"date-time":"2019-10-09T16:37:32Z","timestamp":1570639052000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-319-75214-3_5"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018]]},"ISBN":["9783319752136","9783319752143"],"references-count":20,"URL":"https:\/\/doi.org\/10.1007\/978-3-319-75214-3_5","relation":{},"ISSN":["1865-0929","1865-0937"],"issn-type":[{"type":"print","value":"1865-0929"},{"type":"electronic","value":"1865-0937"}],"subject":[],"published":{"date-parts":[[2018]]}}}