{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,2]],"date-time":"2025-03-02T05:48:23Z","timestamp":1740894503391,"version":"3.38.0"},"publisher-location":"Berlin, Heidelberg","reference-count":14,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540223771"},{"type":"electronic","value":"9783540277767"}],"license":[{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/978-3-540-27776-7_55","type":"book-chapter","created":{"date-parts":[[2011,1,10]],"date-time":"2011-01-10T17:33:28Z","timestamp":1294680808000},"page":"540-549","source":"Crossref","is-referenced-by-count":0,"title":["Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications"],"prefix":"10.1007","author":[{"given":"Minas","family":"Dasygenis","sequence":"first","affiliation":[]},{"given":"Erik","family":"Brockmeyer","sequence":"additional","affiliation":[]},{"given":"Bart","family":"Durinck","sequence":"additional","affiliation":[]},{"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[]},{"given":"Dimitrios","family":"Soudris","sequence":"additional","affiliation":[]},{"given":"Antonios","family":"Thanailakis","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"55_CR1","volume-title":"Custom Memory Management Methodology, Exploration of memory organization for embedded multimedia system design","author":"F. Catthoor","year":"1998","unstructured":"Catthoor, F., Wuytack, S., Greef, E.D., Balasa, F., Nachtergaele, L., Vandecappelle, A.: Custom Memory Management Methodology, Exploration of memory organization for embedded multimedia system design. Kluwer Academic Publishers, Boston (1998)"},{"key":"55_CR2","first-page":"281","volume-title":"IEEE Workshop on Signal Processing Systems (SiPS)","author":"W. Shiue","year":"1999","unstructured":"Shiue, W., Chakrabarti, C.: Memory design and exploration for low power, embedded systems. In: IEEE Workshop on Signal Processing Systems (SiPS), pp. 281\u2013290. IEEE Computer Society Press, Los Alamitos (1999)"},{"key":"55_CR3","doi-asserted-by":"crossref","unstructured":"Chiou, D., Jain, P., Rudolph, L., Devadas, S.: Application-specific memory management for embedded systems using software-controlled caches. In: Proc. of Design Automation Conference, DAC (2000)","DOI":"10.1145\/337292.337523"},{"key":"55_CR4","doi-asserted-by":"publisher","first-page":"74","DOI":"10.1109\/54.844336","volume":"17","author":"L. Benini","year":"2000","unstructured":"Benini, L., Macii, A., Poncino, M.: Increasing energy efficiency of embedded systems by application-specific memory hierarchy generation. IEEE Design and Test of Computers\u00a017, 74\u201385 (2000)","journal-title":"IEEE Design and Test of Computers"},{"key":"55_CR5","doi-asserted-by":"crossref","unstructured":"Givargis, T.D., Henkel, J., Vahid, F.: Interface and cache power exploration for core-based embedded system design. In: International Conference on Computer Aided Design (ICCAD), pp. 270\u2013273 (1999)","DOI":"10.1109\/ICCAD.1999.810660"},{"key":"55_CR6","first-page":"142","volume":"6","author":"P. Panda","year":"2001","unstructured":"Panda, P., Catthoor, F., Dutt, N., Danckaert, K., Brockmeyer, E., Kulkarni, C., Vandecappelle, A., Kjeldsberg, P.: Data and memory optimizations for embedded systems. ACM Trans. on Design Automation for Embedded Systems (TODAES)\u00a06, 142\u2013206 (2001)","journal-title":"ACM Trans. on Design Automation for Embedded Systems (TODAES)"},{"key":"55_CR7","doi-asserted-by":"publisher","first-page":"96","DOI":"10.1109\/92.994985","volume":"10","author":"L. Benini","year":"2002","unstructured":"Benini, L., Macchiarulo, L., Macii, A., Poncino, M.: Layout-driven memory synthesis for embedded systems-on-chip. IEEE Trans on Very Large Scale Integration (VLSI) Systems\u00a010, 96\u2013105 (2002)","journal-title":"IEEE Trans on Very Large Scale Integration (VLSI) Systems"},{"key":"55_CR8","doi-asserted-by":"crossref","unstructured":"Troncon, R., Bruynooghe, M., Janssens, G., Catthoor, F.: Storage size reduction by in-place mapping of arrays. In: Third International Workshop on Verification, Model Checking, and Abstract Interpretation, pp. 167\u2013181 (2002)","DOI":"10.1007\/3-540-47813-2_12"},{"key":"55_CR9","volume-title":"Image and Video Compression Standards","author":"V. Bhaskaran","year":"1998","unstructured":"Bhaskaran, V., Konstantinides, K.: Image and Video Compression Standards. Kluwer Academic Publishers, Dordrecht (1998)"},{"key":"55_CR10","doi-asserted-by":"crossref","first-page":"344","DOI":"10.1109\/76.465087","volume":"54","author":"M. Nam","year":"1995","unstructured":"Nam, M., Kim, J.S., Park, R.H., Shim, Y.S.: A fast hierarchical motion vector estimation algorithm using mean pyramid. IEEE Trans on Circuits and Systems for Video Technology\u00a054, 344\u2013351 (1995)","journal-title":"IEEE Trans on Circuits and Systems for Video Technology"},{"key":"55_CR11","doi-asserted-by":"publisher","first-page":"98","DOI":"10.1109\/TCOM.1981.1094950","volume":"29","author":"J. Jain","year":"1981","unstructured":"Jain, J., Jain, A.: Displacement measurement and its applications in intraframe image coding. IEEE Trans on Communications\u00a029, 98\u2013106 (1981)","journal-title":"IEEE Trans on Communications"},{"key":"55_CR12","unstructured":"Strobach, P.: A new technique in scene adaptive coding. In: Proc. 4th Eur, pp. 1141\u20131144 (1988)"},{"key":"55_CR13","volume-title":"Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation","author":"K. Peter","year":"1999","unstructured":"Peter, K.: Complexity Analysis and VLSI Architectures for MPEG-4 Motion Estimation. Kluwer Academic Publishers, Boston (1999)"},{"key":"55_CR14","doi-asserted-by":"crossref","unstructured":"Soudris, D., Zervas, N.D., Argyriou, A., Dasygenis, M., Tatas, K., Goutis, C., Thanailakis, A.: Data-reuse and parallel embedded architectures for low-power, real-time multimedia applications. In: Proc. of 10th Int. Workshop Power And Timing Modeling, Optimization And Simulation (PATMOS), pp. 243\u2013254 (2000)","DOI":"10.1007\/3-540-45373-3_26"}],"container-title":["Lecture Notes in Computer Science","Computer Systems: Architectures, Modeling, and Simulation"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-27776-7_55","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T15:45:49Z","timestamp":1740843949000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-27776-7_55"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9783540223771","9783540277767"],"references-count":14,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-27776-7_55","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2004]]}}}