{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T19:18:32Z","timestamp":1743016712754,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":17,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540229247"},{"type":"electronic","value":"9783540278665"}],"license":[{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"},{"start":{"date-parts":[[2004,1,1]],"date-time":"2004-01-01T00:00:00Z","timestamp":1072915200000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/978-3-540-27866-5_2","type":"book-chapter","created":{"date-parts":[[2010,9,16]],"date-time":"2010-09-16T20:20:42Z","timestamp":1284668442000},"page":"9-20","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Maintaining Thousands of In-flight Instructions"],"prefix":"10.1007","author":[{"given":"Adrian","family":"Cristal","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Oliverio J.","family":"Santana","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mateo","family":"Valero","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"2_CR1","unstructured":"Akkary, H., Rajwar, R., Srinivasan, S.T.: Checkpoint processing and recovery: towards scalable large instruction window processors. In: Procs. of the 36th Intl. Symp. on Microarchitecture (2003)"},{"key":"2_CR2","unstructured":"Brekelbaum, E., Rupley, J., Wilkerson, C., Black, B.: Hierarchical scheduling windows. In: Procs. of the 35th Intl. Symp. on Microarchitecture (2002)"},{"key":"2_CR3","unstructured":"Cristal, A., Valero, M., Gonzalez, A., Llosa, J.: Large virtual ROBs by processor checkpointing. Technical Report UPC-DAC-2002-39, Departament d\u2019Arquitectura de Computadors, Universitat Polit\u00e8cnica de Catalunya (2002)"},{"key":"2_CR4","doi-asserted-by":"crossref","unstructured":"Cristal, A., Ortega, D., Llosa, J., Valero, M.: Kilo-instruction processors. In: Procs. of the 5th Intl. Symp. on High Performance Computing (2003)","DOI":"10.1007\/978-3-540-39707-6_2"},{"key":"2_CR5","unstructured":"Cristal, A., Martinez, J.F., Llosa, J., Valero, M.: Ephemeral registers with multicheckpointing. Technical Report UPC-DAC-2003-51, Departament d\u2019Arquitectura de Computadors, Universitat Polit\u00e8cnica de Catalunya (2003)"},{"key":"2_CR6","doi-asserted-by":"crossref","unstructured":"Cristal, A., Ortega, D., Llosa, J., Valero, M.: Out-of-order commit processors. In: Procs. of the 10th Intl. Symp. on High-Performance Computer Architecture (2004)","DOI":"10.1007\/978-3-540-39707-6_2"},{"key":"2_CR7","doi-asserted-by":"crossref","unstructured":"Galluzzi, M., Puente, V., Cristal, A., Beivide, R., Gregorio, J.A., Valero, M.: A first glance at kilo-instruction based multiprocessors. In: Procs. of the 1st Conf. on Computing Frontiers (2004)","DOI":"10.1145\/977091.977120"},{"key":"2_CR8","doi-asserted-by":"crossref","unstructured":"Hwu, W.M., Patt, Y.N.: Checkpoint repair for out-of-order execution machines. In: Procs. of the 14th Intl. Symp. on Computer Architecture (1987)","DOI":"10.1145\/30350.30353"},{"key":"2_CR9","doi-asserted-by":"crossref","unstructured":"Lebeck, A., Koppanalil, J., Li, T., Patwardhan, J., Rotenberg, E.: A large, fast instruction window for tolerating cache misses. In: Procs. of the 29th Intl. Symp. on Computer Architecture (2002)","DOI":"10.1145\/545214.545223"},{"key":"2_CR10","unstructured":"Martinez, J.F., Renau, J., Huang, M., Prvulovic, M., Torrellas, J.: Cherry: checkpointed early resource recycling in out-of-order microprocessors. In: Procs. of the 35th Intl. Symp. on Microarchitecture (2002)"},{"key":"2_CR11","unstructured":"Martinez, J.F., Cristal, A., Valero, M., Llosa, J.: Ephemeral registers. Technical Report CSL-TR-2003-1035, Cornell Computer Systems Lab (2003)"},{"key":"2_CR12","unstructured":"Monreal, T., Gonzalez, A., Valero, M., Gonzalez, J., Vi\u00f1als, V.: Delaying physical register allocation through virtual-physical registers. In: Procs. of the 32nd Intl. Symp. on Microarchitecture (1999)"},{"key":"2_CR13","doi-asserted-by":"crossref","unstructured":"Moudgill, M., Pingali, K., Vassiliadis, S.: Register renaming and dynamic speculation: an alternative approach. In: Procs. of the 26th Intl. Symp. on Microarchitecture (1993)","DOI":"10.1109\/MICRO.1993.282756"},{"key":"2_CR14","doi-asserted-by":"crossref","unstructured":"Mutlu, O., Stark, J., Wilkerson, C., Patt, Y.N.: Runahead execution: an alternative to very large instruction windows for out-of-order processors. In: Procs. of the 9th Intl. Symp. on High-Performance Computer Architecture (2003)","DOI":"10.1109\/MM.2003.1261383"},{"key":"2_CR15","doi-asserted-by":"crossref","unstructured":"Palacharla, S., Jouppi, N.P., Smith, J.E.: Complexity-effective superscalar processors. In: Procs. of the 24th Intl. Symp. on Computer Architecture (1997)","DOI":"10.1145\/264107.264201"},{"key":"2_CR16","unstructured":"Park, I., Ooi, C., Vijaykumar, T.: Reducing design complexity of the load\/store queue. In: Procs. of the 36th Intl. Symp. on Microarchitecture (2003)"},{"key":"2_CR17","doi-asserted-by":"crossref","unstructured":"Sethumadhavan, S., Desikan, R., Burger, D., Moore, C., Keckler, S.: Scalable hardware memory disambiguation for high ILP processors. In: Procs. of the 36th Intl. Symp. on Microarchitecture (2003)","DOI":"10.1109\/MM.2004.87"}],"container-title":["Lecture Notes in Computer Science","Euro-Par 2004 Parallel Processing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-27866-5_2","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,10]],"date-time":"2021-11-10T03:00:13Z","timestamp":1636513213000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-27866-5_2"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9783540229247","9783540278665"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-27866-5_2","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2004]]},"assertion":[{"value":"This content has been made available to all.","name":"free","label":"Free to read"}]}}