{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,26]],"date-time":"2025-02-26T05:33:13Z","timestamp":1740547993149,"version":"3.38.0"},"publisher-location":"Berlin, Heidelberg","reference-count":27,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540229896"},{"type":"electronic","value":"9783540301172"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/978-3-540-30117-2_31","type":"book-chapter","created":{"date-parts":[[2010,9,18]],"date-time":"2010-09-18T09:01:02Z","timestamp":1284800462000},"page":"289-300","source":"Crossref","is-referenced-by-count":3,"title":["Logic Modules with Shared SRAM Tables for Field-Programmable Gate Arrays"],"prefix":"10.1007","author":[{"given":"Fatih","family":"Kocan","sequence":"first","affiliation":[]},{"given":"Jason","family":"Meyer","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"31_CR1","doi-asserted-by":"crossref","unstructured":"Agrawal, O., Chang, H., Sharpe-Geisler, B., Schmitz, N., Nguyen, B., Wong, J., Tran, G., Fontana, F., Harding, B.: An innovative, segmented high performance fpga family with variable-grain-architecture and wide-gating functions. In: Proceedings of the 1999 ACM\/SIGDA seventh international symposium on Field programmable gate arrays, Monterey, California, pp. 17\u201326 (1999)","DOI":"10.1145\/296399.296422"},{"key":"31_CR2","doi-asserted-by":"crossref","unstructured":"Ahmed, E., Rose, J.: The effect of lut and cluster size on deep-submicron fpga performance and density. In: Proceedings of the 2000 ACM\/SIGDA eighth international symposium on Field programmable gate arrays, Monterey, California, pp. 3\u201312 (2000)","DOI":"10.1145\/329166.329171"},{"key":"31_CR3","unstructured":"Altera. Programmable Logic Data Book (1996)"},{"key":"31_CR4","doi-asserted-by":"publisher","first-page":"213","DOI":"10.1007\/3-540-63465-7_226","volume-title":"Field-Programmable Logic and Applications","author":"V. Betz","year":"1997","unstructured":"Betz, V., Rose, J.: VPR:A new packing, placement and routing tool for FPGA research. In: Luk, W., Cheung, P.Y., Glesner, M. (eds.) Field-Programmable Logic and Applications, pp. 213\u2013222. Springer, Berlin (1997)"},{"issue":"1","key":"31_CR5","doi-asserted-by":"publisher","first-page":"10","DOI":"10.1109\/54.655177","volume":"15","author":"V. Betz","year":"1998","unstructured":"Betz, V., Rose, J.: How much logic should go in an fpga logic block? IEEE Design and Test of Computers\u00a015(1), 10\u201315 (1998)","journal-title":"IEEE Design and Test of Computers"},{"key":"31_CR6","first-page":"164","volume-title":"Proceedings of the 1994 IEEE\/ACM international conference on Computer-aided design","author":"C.C. Lin","year":"1994","unstructured":"Lin, C.C., Marek-Sadowska, M., Gatlin, D.: Universal logic gate for fpga design. In: Proceedings of the 1994 IEEE\/ACM international conference on Computer-aided design, pp. 164\u2013168. IEEE Computer Society Press, Los Alamitos (1994)"},{"key":"31_CR7","doi-asserted-by":"crossref","unstructured":"Chung, Y.Y., Bergmann, N.M.: Video compression on fpga-based custom computers. In: International Conference on Image Processing, vol. 1, pp. 361\u2013364, October 26-29 (1997)","DOI":"10.1109\/ICIP.1997.647781"},{"issue":"2","key":"31_CR8","doi-asserted-by":"publisher","first-page":"171","DOI":"10.1145\/508352.508353","volume":"34","author":"K. Compton","year":"2002","unstructured":"Compton, K., Hauck, S.: Reconfigurable computing: A survey of systems and software. ACM Computing Surveys (CSUR)\u00a034(2), 171\u2013210 (2002)","journal-title":"ACM Computing Surveys (CSUR)"},{"key":"31_CR9","doi-asserted-by":"crossref","unstructured":"Cong, J., Peck, J., Ding, V.: Rasp: a general logic synthesis system for sram-based fpgas. In: Proc. of ACM\/SIGDA Int\u2019l Symp. on FPGAs, pp. 137\u2013143 (1996)","DOI":"10.1145\/228370.228390"},{"key":"31_CR10","unstructured":"Sentovich, E.M., Singh, K.J., Lavagno, L., Moon, C., Murgai, R., Saldanha, A., Savoj, H., Stephan, P.R., Brayton, R.K., Sangiovanni-Vincentelli, A.: SIS: A system for sequential circuit synthesis. Technical report (1992)"},{"key":"31_CR11","doi-asserted-by":"crossref","unstructured":"Elbirt, J., Paar, C.: An fpga implementation and performance evaluation of the serpent block chiper. In: Proc. of ACM\/SIGDA Int\u2019l Symp. on FPGAs, pp. 33\u201340 (2000)","DOI":"10.1145\/329166.329176"},{"key":"31_CR12","doi-asserted-by":"crossref","unstructured":"Hartenstein, R.: A decade of reconfigurable computing: A visionary retrospective. In: Proceedings of Design, Automation and Test in Europe, pp. 642\u2013649 (2001)","DOI":"10.1109\/DATE.2001.915091"},{"key":"31_CR13","doi-asserted-by":"crossref","unstructured":"Hauser, J.R., Wawrzynek, J.: Garp: A mips processor with a reconfigurable coprocessor. In: Proc. of IEEE Symp. on Field-Programmable Custom Computing Machines, pp. 12\u201321 (1997)","DOI":"10.1109\/FPGA.1997.624600"},{"key":"31_CR14","doi-asserted-by":"crossref","unstructured":"Heron, J., Trainor, D., Woods, R.: Image compression algorithms using re-configurable logic. In: Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers, November 2-5, vol.\u00a01, pp. 399\u2013403 (1997)","DOI":"10.1109\/ACSSC.1997.680271"},{"key":"31_CR15","doi-asserted-by":"crossref","unstructured":"Huang, W.-J., Saxena, N., McCluskey, E.J.: Areliable lz data compressor on reconfigurable coprocessors. In: Proc. of IEEE Symp. on Field-Programmable Custom Computing Machines, April 2000, pp. 249\u2013258 (2000)","DOI":"10.1109\/FPGA.2000.903412"},{"key":"31_CR16","doi-asserted-by":"crossref","unstructured":"Kaviani, A., Brown, S.: Hybrid fpga architecture. In: Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays, Monterey, California, pp. 3\u20139 (1996)","DOI":"10.1145\/228370.228371"},{"key":"31_CR17","first-page":"694","volume-title":"Proceedings of the 2002 IEEE\/ACM international conference on Computer-aided design","author":"S. Kimura","year":"2002","unstructured":"Kimura, S., Horiyama, T., Nakanishi, M., Kajihara, H.: Folding of logic functions and its application to look up table compaction. In: Proceedings of the 2002 IEEE\/ACM international conference on Computer-aided design, pp. 694\u2013697. ACM Press, New York (2002)"},{"issue":"4598","key":"31_CR18","doi-asserted-by":"publisher","first-page":"671","DOI":"10.1126\/science.220.4598.671","volume":"220","author":"S. Kirkpatrick","year":"1983","unstructured":"Kirkpatrick, S., Gelatt, J.C.D., Vecchi, M.P.: Optimization by simulated annealing. Science\u00a0220(4598), 671\u2013680 (1983)","journal-title":"Science"},{"key":"31_CR19","doi-asserted-by":"crossref","unstructured":"Lemieux, G., Lewis, D.: Using sparse crossbars within lut clusters. In: Proceedings of the 2001 ACM\/SIGDA ninth international symposium on Field programmable gate arrays, Monterey, California, pp. 59\u201368 (2001)","DOI":"10.1145\/360276.360299"},{"key":"31_CR20","doi-asserted-by":"crossref","unstructured":"Leung, K.H., Ma, K.W., Wong, W.K., Leong, P.H.W.: Fpga implementation of a microcoded elliptic curve cryptographic processor. In: Proc. of IEEE Symp. on Field-Programmable Custom Computing Machines, pp. 68\u201376 (2000)","DOI":"10.1109\/FPGA.2000.903394"},{"key":"31_CR21","doi-asserted-by":"crossref","unstructured":"Ritter, J., Molitor, P.: A partitioned wavelet-based approach for image compression using fpga\u2019s. In: Proc. of IEEE Custom Integrated Circuits Conf., May 21-24, pp. 547\u2013550 (2000)","DOI":"10.1109\/CICC.2000.852727"},{"key":"31_CR22","doi-asserted-by":"publisher","first-page":"3","DOI":"10.1145\/201310.201311","volume-title":"Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays","author":"S. Thakur","year":"1995","unstructured":"Thakur, S., Wong, D.F.: On designing ulm-based fpga logic modules. In: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays, pp. 3\u20139. ACM Press, New York (1995)"},{"key":"31_CR23","doi-asserted-by":"crossref","unstructured":"Trimberger, S., Duong, K., Conn, B.: Architecture issues and solutions for a high-capacity fpga. In: Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays, Monterey, California, pp. 3\u20139 (1997)","DOI":"10.1145\/258305.258306"},{"key":"31_CR24","unstructured":"Villasenor, J., Mangione-Smith, W.H.: Configurable computing. Scientific American"},{"key":"31_CR25","volume-title":"Principles of CMOS VLSI Design: A Systems Perspective","author":"N.H. Weste","year":"1995","unstructured":"Weste, N.H., Eshraghian, K.: Principles of CMOS VLSI Design: A Systems Perspective. Addison Wesley, Reading (1995)"},{"key":"31_CR26","unstructured":"XILINX. FPGA Data Book (1996)"},{"key":"31_CR27","doi-asserted-by":"crossref","unstructured":"Yan, A., Cheng, R., Wilton, S.J.: On the sensitivity of fpga architectural conclusions to experimental assumptions, tools, and techniques. In: Proceedings of the 2002 ACM\/SIGDA tenth international symposium on Field-programmable gate arrays, Monterey, California, pp. 147\u2013156 (2002)","DOI":"10.1145\/503048.503071"}],"container-title":["Lecture Notes in Computer Science","Field Programmable Logic and Application"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-30117-2_31.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,25]],"date-time":"2025-02-25T22:30:56Z","timestamp":1740522656000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-30117-2_31"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9783540229896","9783540301172"],"references-count":27,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-30117-2_31","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2004]]}}}