{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,26]],"date-time":"2025-02-26T05:34:06Z","timestamp":1740548046114,"version":"3.38.0"},"publisher-location":"Berlin, Heidelberg","reference-count":21,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540230953"},{"type":"electronic","value":"9783540302056"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/978-3-540-30205-6_6","type":"book-chapter","created":{"date-parts":[[2010,9,21]],"date-time":"2010-09-21T21:00:42Z","timestamp":1285102842000},"page":"36-47","source":"Crossref","is-referenced-by-count":3,"title":["The Certainty of Uncertainty: Randomness in Nanometer Design"],"prefix":"10.1007","author":[{"given":"Hongliang","family":"Chang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Haifeng","family":"Qian","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sachin S.","family":"Sapatnekar","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"297","reference":[{"key":"6_CR1","doi-asserted-by":"crossref","unstructured":"Agarwal, A., Blaauw, D., Zolotov, V., Vrudhula, S.: Computation and refinement of statistical bounds on circuit delay. In: Proceedings of the ACM\/IEEE Design Automation Conference, June 2003, pp. 348\u2013353 (2003)","DOI":"10.1145\/775832.775922"},{"key":"6_CR2","doi-asserted-by":"crossref","unstructured":"Agarwal, A., Blaauw, D., Zolotov, V., Vrudhula, S.: Statistical timing analysis using bounds. In: Proceedings of Design and Test in Europe, February 2003, pp. 62\u201367 (2003)","DOI":"10.1109\/DATE.2003.1253588"},{"issue":"9","key":"6_CR3","doi-asserted-by":"publisher","first-page":"1243","DOI":"10.1109\/TCAD.2003.816217","volume":"22","author":"A. Agarwal","year":"2003","unstructured":"Agarwal, A., Zolotov, V., Blaauw, D.T.: Statistical timing analysis using bounds and selective enumeration. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\u00a022(9), 1243\u20131260 (2003)","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"6_CR4","unstructured":"Berkelaar, M.: Statistical delay calculation, a linear time method. In: Proceedings of ACM\/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU), December 1997, pp. 15\u201324 (1997)"},{"issue":"1","key":"6_CR5","doi-asserted-by":"publisher","first-page":"63","DOI":"10.1109\/92.219908","volume":"1","author":"R. Burch","year":"1993","unstructured":"Burch, R., Najm, F., Yang, P., Trick, T.N.: A Monte Carlo approach for power estimation. IEEE Transactions on VLSI Systems\u00a01(1), 63\u201371 (1993)","journal-title":"IEEE Transactions on VLSI Systems"},{"key":"6_CR6","unstructured":"Chang, H., Sapatnekar, S.S.: Statistical timing analysis considering spatial correlations using a single PERT-like traversal. In: Proceedings of the IEEE\/ACM International Conference on Computer-Aided Design, November 2003, pp. 621\u2013625 (2003)"},{"key":"6_CR7","doi-asserted-by":"crossref","unstructured":"Chen, G., Sapatnekar, S.S.: Partition-driven standard cell thermal placement. In: Proceedings of the ACM International Symposium on Physical Design, pp. 75\u201380 (2003)","DOI":"10.1145\/640000.640018"},{"issue":"10","key":"6_CR8","doi-asserted-by":"publisher","first-page":"1211","DOI":"10.1109\/43.875333","volume":"19","author":"Y. Cheng","year":"2000","unstructured":"Cheng, Y., Kang, S.M.: A temperature-aware simulation environment for reliable ULSI chip design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\u00a019(10), 1211\u20131220 (2000)","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"6_CR9","doi-asserted-by":"publisher","first-page":"1005","DOI":"10.1016\/0038-1101(92)90332-7","volume":"35","author":"Y.L. Coz Le","year":"1992","unstructured":"Le Coz, Y.L., Iverson, R.B.: A stochastic algorithm for high-speed capacitance extraction in integrated circuits. Solid-State Electronics\u00a035, 1005\u20131012 (1992)","journal-title":"Solid-State Electronics"},{"key":"6_CR10","doi-asserted-by":"crossref","unstructured":"Goplen, B., Sapatnekar, S.S.: Efficient thermal placement of standard cells in 3D IC\u2019s using a force directed approach. In: Proceedings of the IEEE\/ACM International Conference on Computer-Aided Design, pp. 86\u201389 (2003)","DOI":"10.1109\/ICCAD.2003.1257591"},{"key":"6_CR11","doi-asserted-by":"crossref","unstructured":"Jacobs, E., Berkelaar, M.R.C.M.: Gate sizing using a statistical delay model. In: Proceedings of Design and Test in Europe, pp. 283\u2013290 (2000)","DOI":"10.1145\/343647.343782"},{"issue":"1","key":"6_CR12","doi-asserted-by":"publisher","first-page":"32","DOI":"10.1109\/43.974135","volume":"21","author":"J. Lou","year":"2002","unstructured":"Lou, J., Thakur, S., Krishnamoorthy, S., Sheng, H.S.: Estimating routing congestion using probabilistic analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\u00a021(1), 32\u201341 (2002)","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"6_CR13","volume-title":"Multivariate Statistical Methods","author":"D.F. Morrison","year":"1976","unstructured":"Morrison, D.F.: Multivariate Statistical Methods. McGraw-Hill, New York (1976)"},{"key":"6_CR14","doi-asserted-by":"crossref","DOI":"10.1017\/CBO9780511814075","volume-title":"Randomized algorithms","author":"R. Motwani","year":"1995","unstructured":"Motwani, R., Raghavan, P.: Randomized algorithms. Cambridge University Press, Cambridge (1995)"},{"issue":"5","key":"6_CR15","doi-asserted-by":"publisher","first-page":"544","DOI":"10.1109\/43.998626","volume":"21","author":"M. Orshansky","year":"2002","unstructured":"Orshansky, M., Milor, L., Chen, P., Keutzer, K., Hu, C.: Impact of spatial intrachip gate length variability on the performance of high-speed digital circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\u00a021(5), 544\u2013553 (2002)","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"6_CR16","doi-asserted-by":"crossref","unstructured":"Qian, H., Nassif, S.R., Sapatnekar, S.S.: Random walks in a supply network. In: Proceedings of the ACM\/IEEE Design Automation Conference, pp. 93\u201398 (2003)","DOI":"10.1145\/775832.775860"},{"key":"6_CR17","doi-asserted-by":"crossref","unstructured":"Qian, H., Sapatnekar, S.S.: Hierarchical random-walk algorithms for power grid analysis. In: Proceedings of the Asia\/South Pacific Design Automation Conference, pp. 499\u2013504 (2004)","DOI":"10.1109\/ASPDAC.2004.1337626"},{"issue":"3","key":"6_CR18","doi-asserted-by":"publisher","first-page":"7","DOI":"10.1109\/MDT.2003.1198680","volume":"20","author":"S.S. Sapatnekar","year":"2002","unstructured":"Sapatnekar, S.S., Su, H.: Analysis and optimization of power grids. IEEE Design and Test\u00a020(3), 7\u201315 (2002)","journal-title":"IEEE Design and Test"},{"key":"6_CR19","doi-asserted-by":"crossref","unstructured":"Vrudhula, S.B.K., Blaauw, D., Sirichotiyakul, S.: Estimation of the likelihood of capacitive coupling noise. In: Proceedings of the ACM\/IEEE Design Automation Conference, pp. 653\u2013658 (2002)","DOI":"10.1145\/513918.514085"},{"issue":"12","key":"6_CR20","doi-asserted-by":"publisher","first-page":"1434","DOI":"10.1109\/TCAD.2002.804385","volume":"21","author":"T.-Y. Wang","year":"2002","unstructured":"Wang, T.-Y., Chen, C.C.-P.: 3-D thermal-ADI: A linear-time chip level transient thermal simulator. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems\u00a021(12), 1434\u20131445 (2002)","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"6_CR21","doi-asserted-by":"crossref","unstructured":"Westra, J., Bartels, C., Groeneveld, P.: Probabilistic congestion prediction. In: Proceedings of the ACM International Symposium on Physical Design, pp. 204\u2013209 (2004)","DOI":"10.1145\/981066.981110"}],"container-title":["Lecture Notes in Computer Science","Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-30205-6_6.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,2,25]],"date-time":"2025-02-25T23:48:56Z","timestamp":1740527336000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-30205-6_6"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9783540230953","9783540302056"],"references-count":21,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-30205-6_6","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2004]]}}}