{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T20:03:50Z","timestamp":1725566630290},"publisher-location":"Berlin, Heidelberg","reference-count":17,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540230953"},{"type":"electronic","value":"9783540302056"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2004]]},"DOI":"10.1007\/978-3-540-30205-6_72","type":"book-chapter","created":{"date-parts":[[2010,9,21]],"date-time":"2010-09-21T21:00:42Z","timestamp":1285102842000},"page":"701-710","source":"Crossref","is-referenced-by-count":0,"title":["Pipelines in Dynamic Dual-Rail Circuits"],"prefix":"10.1007","author":[{"given":"Jing-ling","family":"Yang","sequence":"first","affiliation":[]},{"given":"Chiu-sing","family":"Choy","sequence":"additional","affiliation":[]},{"given":"Cheong-fat","family":"Chan","sequence":"additional","affiliation":[]},{"given":"Kong-pong","family":"Pun","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"issue":"6","key":"72_CR1","doi-asserted-by":"publisher","first-page":"720","DOI":"10.1145\/63526.63532","volume":"32","author":"I.E. Sutherland","year":"1989","unstructured":"Sutherland, I.E.: Micropipelines. Communications of the ACM\u00a032(6), 720\u2013738 (1989)","journal-title":"Communications of the ACM"},{"issue":"11","key":"72_CR2","doi-asserted-by":"publisher","first-page":"1651","DOI":"10.1109\/4.98986","volume":"26","author":"T.E. Williams","year":"1991","unstructured":"Williams, T.E., Horowiz, M.A.: A Zero-Overhead Self-Timed 160-ns 54-b CMOS Divider. IEEE Journal of Solid-State Circuits\u00a026(11), 1651\u20131661 (1991)","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"72_CR3","unstructured":"Davis, A., Nowick, S.M.: An introduction to asynchronous circuit design University of Utah. Technical report (1997)"},{"key":"72_CR4","unstructured":"Wakerly, J.: Error Detecting Codes, Self-Checking Circuits and Applications. Elsevier North-Holland, Inc (1978)"},{"key":"72_CR5","doi-asserted-by":"publisher","first-page":"111","DOI":"10.1016\/0167-9260(95)00012-5","volume":"19","author":"H. Hulgaard","year":"1995","unstructured":"Hulgaard, H., Burns, S.M., Borriello, G.: Testing Asynchronous Circuits: A Survey. Integration, the VLSI J.\u00a019, 111\u2013131 (1995)","journal-title":"Integration, the VLSI J."},{"key":"72_CR6","doi-asserted-by":"crossref","unstructured":"Beerel, P., Meng, T.Y.: Semi-Modularity and Testability of speed-independent Circuits. Integration, TheVLSI J.\u00a013 (September 1992)","DOI":"10.1016\/0167-9260(92)90033-U"},{"key":"72_CR7","first-page":"118","volume-title":"Advanced Research in VLSI: Proceedings of the 1991 UC Santa Cruz Conference","author":"A.J. Martin","year":"1991","unstructured":"Martin, A.J., Hazewindus, P.J.: Testing Delay-insensitive Circuits. In: Advanced Research in VLSI: Proceedings of the 1991 UC Santa Cruz Conference, pp. 118\u2013132. The MIT Press, Cambridge (1991)"},{"volume-title":"Self-timed Control of Concurrent Processes","year":"1990","key":"72_CR8","unstructured":"Varshavky, V.I. (ed.): Self-timed Control of Concurrent Processes. Kluwer Academic Publishers, Dordrecht (1990)"},{"issue":"6","key":"72_CR9","doi-asserted-by":"publisher","first-page":"1082","DOI":"10.1109\/JSSC.1986.1052651","volume":"21","author":"L..M. Chu","year":"1986","unstructured":"Chu, L.M., Puffrey, D.L.: Design Procedure for Differential Cascade Voltage Switch Circuits. IEEE J. Solid-State Circuits\u00a021(6), 1082\u20131087 (1986)","journal-title":"IEEE J. Solid-State Circuits"},{"key":"72_CR10","doi-asserted-by":"crossref","unstructured":"Jha, N.K.: Testing for Multiple Faults in Domino-CMOS Logic Circuits. IEEE Transaction on Computer-aided Design\u00a07(1) (January 1988)","DOI":"10.1109\/43.3138"},{"key":"72_CR11","doi-asserted-by":"crossref","unstructured":"Jha, N.K.: Strong Fault-Secure and Strong Self-checking Domino-CMOS Implementations of Totally Self-Checking Circuits. IEEE Transactions on Computer-aided Design\u00a09(3) (March 1990)","DOI":"10.1109\/43.46809"},{"key":"72_CR12","doi-asserted-by":"crossref","unstructured":"Kanopoulos, N., Vasanthavada, N.: Testing of Differential Cascode Voltage Switch (DCVS) Circuits. IEEE Journal of Solid-State Circuits\u00a025(3) (June 1990)","DOI":"10.1109\/4.102679"},{"key":"72_CR13","unstructured":"Yang, J.-l., Choy, C.-s., Chan, C.-f., Pun, K.-p.: Design for selfchecking and self-timed datapath. In: Proceedings of 21st VLSI Test Symposium (2003)"},{"key":"72_CR14","doi-asserted-by":"publisher","first-page":"219","DOI":"10.1007\/BF00993088","volume":"6","author":"I. David","year":"1995","unstructured":"David, I., Ginosar, R., Yoeli, M.: Self-Timed is Self-Checking. Journal of Electronic Testing: Theory and Application\u00a06, 219\u2013228 (1995)","journal-title":"Journal of Electronic Testing: Theory and Application"},{"key":"72_CR15","doi-asserted-by":"crossref","unstructured":"Rennels, D.A., Kim, H.: Concurrent Error Detection in Self-timed VLSI. In: FTCS-24, Austin, Texas, June 15-17 (1994)","DOI":"10.1109\/FTCS.1994.315653"},{"key":"72_CR16","doi-asserted-by":"crossref","unstructured":"Matsubara, G., Ide, N.: A Low Power Zero-Overhead Self-Timed Division and Square Root Unit Combining a Single-Rail Static with a Dual-Rail Dynamic Circuits. In: Proceedings of the Third International Symposium on Advanced Research in Asynchronous Circuits and System, pp. 198\u2013209 (1997)","DOI":"10.1109\/ASYNC.1997.587175"},{"key":"72_CR17","doi-asserted-by":"crossref","unstructured":"Singh, M., Nowick, S.M.: High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapath. In: Proceedings of the Sixth International Symposium on Advanced Research in Asynchronous Circuits and System, pp. 198\u2013209 (2000)","DOI":"10.1109\/ASYNC.2000.837017"}],"container-title":["Lecture Notes in Computer Science","Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-30205-6_72.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,19]],"date-time":"2020-11-19T04:48:28Z","timestamp":1605761308000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-30205-6_72"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2004]]},"ISBN":["9783540230953","9783540302056"],"references-count":17,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-30205-6_72","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2004]]}}}