{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,19]],"date-time":"2025-03-19T15:06:50Z","timestamp":1742396810633},"publisher-location":"Berlin, Heidelberg","reference-count":32,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540243960"},{"type":"electronic","value":"9783540304968"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2005]]},"DOI":"10.1007\/978-3-540-30496-8_18","type":"book-chapter","created":{"date-parts":[[2010,3,1]],"date-time":"2010-03-01T15:39:21Z","timestamp":1267457961000},"page":"215-229","source":"Crossref","is-referenced-by-count":11,"title":["Secure AES Hardware Module for Resource Constrained Devices"],"prefix":"10.1007","author":[{"given":"Elena","family":"Trichina","sequence":"first","affiliation":[]},{"given":"Tymur","family":"Korkishko","sequence":"additional","affiliation":[]}],"member":"297","reference":[{"key":"18_CR1","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"309","DOI":"10.1007\/3-540-44709-1_26","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"M. Akkar","year":"2001","unstructured":"Akkar, M., Giraud, C.: An implementation of DES and AES, secure against some attacks. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, pp. 309\u2013318. Springer, Heidelberg (2001)"},{"key":"18_CR2","doi-asserted-by":"crossref","unstructured":"Anderson, R., Kuhn, M.: Low cost attacks on tamper resistant devices. In: Proc. Security Protocols: IWSP 1997. LNCS, vol.\u00a01361, pp. 125\u2013136 (1997)","DOI":"10.1007\/BFb0028165"},{"key":"18_CR3","doi-asserted-by":"crossref","unstructured":"Bl\u00f6mmer, J., Merchan, J.G., Krummel, V.: Provably secure masking of AES. IACR Cryptology ePrint Archive Report 2004\/101 (2004)","DOI":"10.1007\/978-3-540-30564-4_5"},{"key":"18_CR4","unstructured":"Bucci, M., Germani, L., Guglielmo, M., Luzzi, R., Trifiletti, A.: A simulation methodology for DPA resistance testing of cryptographic processors (manuscript, 2003)"},{"key":"18_CR5","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"398","DOI":"10.1007\/3-540-48405-1_26","volume-title":"Advances in Cryptology - CRYPTO \u201999","author":"S. Chari","year":"1999","unstructured":"Chari, S., Jutla, C., Rao, J., Rohatgi, P.: Towards sound approaches to counteract power-analysis attacks. In: Wiener, M.J. (ed.) CRYPTO 1999. LNCS, vol.\u00a01666, pp. 398\u2013412. Springer, Heidelberg (1999)"},{"key":"18_CR6","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"252","DOI":"10.1007\/3-540-44499-8_20","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2000","author":"C. Clavier","year":"2000","unstructured":"Clavier, C., Coron, J.-S., Dabbous, N.: Differential power analysis in the presence of hardware countermeasures. In: Paar, C., Ko\u00e7, \u00c7.K. (eds.) CHES 2000. LNCS, vol.\u00a01965, pp. 252\u2013263. Springer, Heidelberg (2000)"},{"key":"18_CR7","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-662-04722-4","volume-title":"The design of Rijndael: AES - The Advanced Encryption Standard","author":"J. Daemen","year":"2002","unstructured":"Daemen, J., Rijmen, V.: The design of Rijndael: AES - The Advanced Encryption Standard. Springer, Heidelberg (2002)"},{"key":"18_CR8","unstructured":"Fruhauf, S., Sourge, L.: Safety device against the unauthorized detection of protected data. U.S. patent 5,404,402 (1995)"},{"key":"18_CR9","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"251","DOI":"10.1007\/3-540-44709-1_21","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"K. Gandolfi","year":"2001","unstructured":"Gandolfi, K., Mourtel, C., Oliver, F.: Electromagnetic analysis: concrete results. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, pp. 251\u2013261. Springer, Heidelberg (2001)"},{"key":"18_CR10","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"198","DOI":"10.1007\/3-540-36400-5_16","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"J. Goli\u00e7","year":"2003","unstructured":"Goli\u00e7, J., Tymen, C.: Multiplicative masking and power analysis of AES. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 198\u2013212. Springer, Heidelberg (2003)"},{"key":"18_CR11","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"3","DOI":"10.1007\/3-540-44709-1_2","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"L. Goubin","year":"2001","unstructured":"Goubin, L.: A sound method for switching between boolean and arithmetic masking. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, pp. 3\u201315. Springer, Heidelberg (2001)"},{"key":"18_CR12","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"388","DOI":"10.1007\/3-540-48405-1_25","volume-title":"Advances in Cryptology - CRYPTO \u201999","author":"P. Kocher","year":"1999","unstructured":"Kocher, P., Jaffe, J., Jun, B.: Differential power analysis. In: Wiener, M.J. (ed.) CRYPTO 1999. LNCS, vol.\u00a01666, pp. 388\u2013397. Springer, Heidelberg (1999)"},{"key":"18_CR13","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"crossref","first-page":"104","DOI":"10.1007\/3-540-68697-5_9","volume-title":"Advances in Cryptology - CRYPTO \u201996","author":"P. Kocher","year":"1996","unstructured":"Kocher, P.: Timing attacks on implementations of Diffie-Hellmann, RSA, DSS, and other systems. In: Koblitz, N. (ed.) CRYPTO 1996. LNCS, vol.\u00a01109, pp. 104\u2013113. Springer, Heidelberg (1996)"},{"key":"18_CR14","unstructured":"Kocher, P., Jaffe, J., Jun, B.: Using unpredictable information to minimize leakage from smartcards and other cryptosystems, USA patent, International Publication number WO 99\/63696 (1999)"},{"key":"18_CR15","unstructured":"Kommerling, O., Kuhn, M.: Design principles for tamper-resistant smartcard processors. In: Proc. USENIX Workshop on Smartcard Technology (Smartcard 1999), pp. 9\u201320 (1998)"},{"key":"18_CR16","unstructured":"Lu, C.C., Tseng, S.-Y.: Integrated design of AES (Advanced Encryption Srandard) encryptor and decryptor. In: Proc. IEEE conf. on Application-Specific Systems, Architectures, and Processors (ASAP 2002), pp. 277\u2013285 (2002)"},{"key":"18_CR17","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"28","DOI":"10.1007\/3-540-44709-1_4","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"D. May","year":"2001","unstructured":"May, D., Muller, H.L., Smart, N.P.: Random register renaming to foil DPA. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, p. 28. Springer, Heidelberg (2001)"},{"issue":"4","key":"18_CR18","doi-asserted-by":"publisher","first-page":"483","DOI":"10.1109\/TC.2003.1190589","volume":"52","author":"S. Mangard","year":"2003","unstructured":"Mangard, S., Aigner, M., Dominikus, S.: A highly regular and scalable AES hardware architecture. IEEE Transactions on Computers\u00a052(4), 483\u2013491 (2003)","journal-title":"IEEE Transactions on Computers"},{"key":"18_CR19","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"150","DOI":"10.1007\/3-540-44706-7_11","volume-title":"Fast Software Encryption","author":"T. Messerges","year":"2001","unstructured":"Messerges, T.: Securing the AES finalists against power analysis attacks. In: Schneier, B. (ed.) FSE 2000. LNCS, vol.\u00a01978, pp. 150\u2013165. Springer, Heidelberg (2001)"},{"issue":"5","key":"18_CR20","doi-asserted-by":"publisher","first-page":"522","DOI":"10.1109\/TC.2002.1004593","volume":"51","author":"T.S. Messerges","year":"2002","unstructured":"Messerges, T.S., Dabbish, E.A., Sloan, R.H.: Examining smart-card security under the thread of power analysis. IEEE Trans. Computers\u00a051(5), 522\u2013541 (2002)","journal-title":"IEEE Trans. Computers"},{"key":"18_CR21","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"238","DOI":"10.1007\/3-540-44499-8_19","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2000","author":"T.S. Messerges","year":"2000","unstructured":"Messerges, T.S.: Using second-order power analysis to attack DPA resistant software. In: Paar, C., Ko\u00e7, \u00c7.K. (eds.) CHES 2000. LNCS, vol.\u00a01965, pp. 238\u2013251. Springer, Heidelberg (2000)"},{"key":"18_CR22","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"172","DOI":"10.1007\/3-540-36400-5_14","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"S. Morioka","year":"2003","unstructured":"Morioka, S., Satoh, A.: An optimized S-Box circuit architecture for low power AES design. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 172\u2013186. Springer, Heidelberg (2003)"},{"key":"18_CR23","first-page":"23","volume-title":"Proc. Proceeding 8th IEEE International Symposium on Asynchronous Circuits and Systems \u2013 ASYNC 2002","author":"S. Moore","year":"2002","unstructured":"Moore, S., Anderson, R., Cunningham, P., Mullins, R., Taylor, G.: Improving smart card security using self-timed circuits. In: Proc. Proceeding 8th IEEE International Symposium on Asynchronous Circuits and Systems \u2013 ASYNC 2002, pp. 23\u201358. IEEE, Los Alamitos (2002)"},{"key":"18_CR24","unstructured":"Paar, C.: Efficient VLSI architectures for bit parallel computations in Galois fields. PhD Thesis, University of Essen, Germany (1994)"},{"key":"18_CR25","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"200","DOI":"10.1007\/3-540-45418-7_17","volume-title":"Smart Card Programming and Security","author":"J.J. Quisquater","year":"2001","unstructured":"Quisquater, J.J., Samide, D.: Electromagnetic analysis (ema): measures and counter-measures for smart cards. In: Attali, S., Jensen, T. (eds.) E-smart 2001. LNCS, vol.\u00a02140, pp. 200\u2013210. Springer, Heidelberg (2001)"},{"key":"18_CR26","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"175","DOI":"10.1007\/3-540-44709-1_16","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2001","author":"A. Rudra","year":"2001","unstructured":"Rudra, A., Dubey, P., Julta, C., Kumar, V., Rao, J., Rohatgi, P.: Efficient Rijndael implementation with composite field arithmetic. In: Ko\u00e7, \u00c7.K., Naccache, D., Paar, C. (eds.) CHES 2001. LNCS, vol.\u00a02162, pp. 175\u2013188. Springer, Heidelberg (2001)"},{"key":"18_CR27","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"239","DOI":"10.1007\/3-540-45682-1_15","volume-title":"Advances in Cryptology - ASIACRYPT 2001","author":"A. Satoh","year":"2001","unstructured":"Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A compact Rijndael hardware architecture with S-Box optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol.\u00a02248, pp. 239\u2013254. Springer, Heidelberg (2001)"},{"key":"18_CR28","unstructured":"Sprunk, E.: Clock frequency modulation for secure microprocessors, USA patent number WO 99\/63696 (1999)"},{"key":"18_CR29","unstructured":"Tiri, K., Akmal, M., Verbauwhede, I.: A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards. In: Proc. IEEE 28th Europen Solid-State Circuit Conf. \u2013 ESSCIRC 2002 (2002)"},{"key":"18_CR30","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"187","DOI":"10.1007\/3-540-36400-5_15","volume-title":"Cryptographic Hardware and Embedded Systems - CHES 2002","author":"E.E. Trichina","year":"2003","unstructured":"Trichina, E.E., De Seta, D., Germani, L.: Simplified Adaptive Multiplicative Masking for AES and its secure implementation. In: Kaliski Jr., B.S., Ko\u00e7, \u00c7.K., Paar, C. (eds.) CHES 2002. LNCS, vol.\u00a02523, pp. 187\u2013197. Springer, Heidelberg (2003)"},{"key":"18_CR31","unstructured":"Wolkerstorfer, J.: An ASIC implementation of the AES MixColumn operation. In: Proceedings Austrochip 2001 (2001)"},{"key":"18_CR32","series-title":"Lecture Notes in Computer Science","doi-asserted-by":"publisher","first-page":"67","DOI":"10.1007\/3-540-45760-7_6","volume-title":"Topics in Cryptology - CT-RSA 2002","author":"J. Wolkerstorfer","year":"2002","unstructured":"Wolkerstorfer, J., Oswald, E., Lamberger, M.: An ASIC implementation of the AES S-Boxes. In: Preneel, B. (ed.) CT-RSA 2002. LNCS, vol.\u00a02271, pp. 67\u201378. Springer, Heidelberg (2002)"}],"container-title":["Lecture Notes in Computer Science","Security in Ad-hoc and Sensor Networks"],"original-title":[],"link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-30496-8_18.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,11,19]],"date-time":"2020-11-19T04:55:04Z","timestamp":1605761704000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-30496-8_18"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2005]]},"ISBN":["9783540243960","9783540304968"],"references-count":32,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-30496-8_18","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2005]]}}}