{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T07:34:16Z","timestamp":1742974456585,"version":"3.40.3"},"publisher-location":"Berlin, Heidelberg","reference-count":16,"publisher":"Springer Berlin Heidelberg","isbn-type":[{"type":"print","value":"9783540408222"},{"type":"electronic","value":"9783540452348"}],"license":[{"start":{"date-parts":[[2003,1,1]],"date-time":"2003-01-01T00:00:00Z","timestamp":1041379200000},"content-version":"tdm","delay-in-days":0,"URL":"http:\/\/www.springer.com\/tdm"}],"content-domain":{"domain":["link.springer.com"],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2003]]},"DOI":"10.1007\/978-3-540-45234-8_144","type":"book-chapter","created":{"date-parts":[[2011,1,8]],"date-time":"2011-01-08T06:12:05Z","timestamp":1294467125000},"page":"1162-1165","update-policy":"https:\/\/doi.org\/10.1007\/springer_crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["APPLES: A Full Gate-Timing FPGA-Based Hardware Simulator"],"prefix":"10.1007","author":[{"given":"Damian","family":"Dalton","sequence":"first","affiliation":[]},{"given":"Vivian","family":"Bessler","sequence":"additional","affiliation":[]},{"given":"Jeffery","family":"Griffiths","sequence":"additional","affiliation":[]},{"given":"Andrew","family":"McCarthy","sequence":"additional","affiliation":[]},{"given":"Abhay","family":"Vadher","sequence":"additional","affiliation":[]},{"given":"Rory","family":"O\u2019Kane","sequence":"additional","affiliation":[]},{"given":"Rob","family":"Quigley","sequence":"additional","affiliation":[]},{"given":"Declan","family":"O\u2019Connor","sequence":"additional","affiliation":[]}],"member":"297","published-online":{"date-parts":[[2003,9,30]]},"reference":[{"issue":"12","key":"144_CR1","doi-asserted-by":"publisher","first-page":"1428","DOI":"10.1109\/43.898825","volume":"19","author":"MacMillan","year":"2000","unstructured":"MacMillan, et al.: An Industrial View of Electronic Design Automation. IEEE Trans CAD of ICs and Systems\u00a019(12), 1428\u20131449 (2000)","journal-title":"IEEE Trans CAD of ICs and Systems"},{"issue":"12","key":"144_CR2","doi-asserted-by":"publisher","first-page":"1476","DOI":"10.1109\/43.898827","volume":"19","author":"Darringer","year":"2000","unstructured":"Darringer, et al.: EDA in IBM: Past, Present and Future. IEEE Trans. CAD of ICs and Systems\u00a019(12), 1476\u20131498 (2000)","journal-title":"IEEE Trans. CAD of ICs and Systems"},{"issue":"12","key":"144_CR3","doi-asserted-by":"publisher","first-page":"1449","DOI":"10.1109\/43.898826","volume":"19","author":"Breuer","year":"2000","unstructured":"Breuer, et al.: Fundamental CAD Algorithms. IEEE Trans. CAD of ICs and Systems\u00a019(12), 1449\u20131476 (2000)","journal-title":"IEEE Trans. CAD of ICs and Systems"},{"key":"144_CR4","doi-asserted-by":"crossref","unstructured":"Dunn: IBM\u2019s Engineering Design System Support for VLSI Design and Verification. IEEE Design and Test of Computers, 30\u201340 (February 1984)","DOI":"10.1109\/MDT.1984.5005573"},{"key":"144_CR5","unstructured":"Agrawal et al: Logic Simulation and Parallel Processing. In: IEEE Proc. Intl. Conf. on CAD (ICCAD) (1990)"},{"key":"144_CR6","doi-asserted-by":"crossref","unstructured":"Soule et al: Parallel Logic Simulation on General Purpose Machines. In: IEEE Proc. Design Automation Conf., 166\u2013171 (June 1988)","DOI":"10.1109\/DAC.1988.14753"},{"key":"144_CR7","doi-asserted-by":"crossref","unstructured":"Mueller-Thuns, et al.: Benchmarking Parallel Processing Platforms: An Application Perspective. IEEE Trans on Parallel and Distributive Systems\u00a04(8) (August 1998)","DOI":"10.1109\/71.238628"},{"key":"144_CR8","doi-asserted-by":"crossref","unstructured":"Chandy, M.: Asynchronous Distributed Simulation via Sequence of Parallel Computations. Comm. ACM\u00a024(ii) (April 1981)","DOI":"10.1145\/358598.358613"},{"key":"144_CR9","unstructured":"Bryant: Simulation of Packet Communications Architecture Computer Systems. Tech Rept MIT-LCS-TR-188. MIT Cambridge, USA (!977)"},{"key":"144_CR10","unstructured":"Briner: Parallel Mixed Level Simulation of Digital Circuits Virtual Time. PH.D Thesis, Dept. of Elec. Eng., Duke University (1990)"},{"key":"144_CR11","doi-asserted-by":"crossref","unstructured":"Jefferson: Virtual Time. ACM Trans Programming Languages Systems, 404-425 (July 1985)","DOI":"10.1145\/3916.3988"},{"key":"144_CR12","doi-asserted-by":"crossref","unstructured":"Soule, G.: Characterisation of Parallelism and Deadlocks in Distributed Digital Logic Simulation. In: Proc. 26th Design Automation Conf., 81\u201386 (June 1989)","DOI":"10.1145\/74382.74397"},{"key":"144_CR13","doi-asserted-by":"crossref","unstructured":"Ghosh, L.: An Asynchronous Distributed Approach for the Simulation of Behavior-level Models on Parallel Processors. IEEE Trans on Parallel and Distributed Systems\u00a06(6) (1995)","DOI":"10.1109\/71.388044"},{"key":"144_CR14","unstructured":"www.cadence.com , www.memtorgraphics.com , www.aldec.com , www.aptix.com , www.axis.com , www.tharas.com , www.eve.com"},{"key":"144_CR15","doi-asserted-by":"crossref","unstructured":"Dalton: The Speedup Performance of an Associative Memory Based Logic Simulator. In: Proc. 5th Intl. Conf. on Parallel Computation Technologies (PaCT 1999), St Petersburg, Russia, LNCS Springer-Verlag (September 1999)","DOI":"10.1007\/3-540-48387-X_22"},{"key":"144_CR16","doi-asserted-by":"crossref","unstructured":"Dalton: Avoiding Conventional Overheads in Parallel Logic Simulation: A New Architecture. In: ACM\/IEEE Proc. Intl. Conf. on High Performance Computing, Calcutta, India, December (1999)","DOI":"10.1007\/978-3-540-46642-0_53"}],"container-title":["Lecture Notes in Computer Science","Field Programmable Logic and Application"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/link.springer.com\/content\/pdf\/10.1007\/978-3-540-45234-8_144","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,1]],"date-time":"2025-03-01T14:56:13Z","timestamp":1740840973000},"score":1,"resource":{"primary":{"URL":"http:\/\/link.springer.com\/10.1007\/978-3-540-45234-8_144"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2003]]},"ISBN":["9783540408222","9783540452348"],"references-count":16,"URL":"https:\/\/doi.org\/10.1007\/978-3-540-45234-8_144","relation":{},"ISSN":["0302-9743","1611-3349"],"issn-type":[{"type":"print","value":"0302-9743"},{"type":"electronic","value":"1611-3349"}],"subject":[],"published":{"date-parts":[[2003]]},"assertion":[{"value":"30 September 2003","order":1,"name":"first_online","label":"First Online","group":{"name":"ChapterHistory","label":"Chapter History"}}]}}